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Surendra Mobiyadavem330
authored andcommitted
cxgb4: collect ASIC LA dumps from ULP TX
Signed-off-by: Surendra Mobiya <[email protected]> Signed-off-by: Rahul Lakkireddy <[email protected]> Signed-off-by: Ganesh Goudar <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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4 files changed

+48
-3
lines changed

4 files changed

+48
-3
lines changed

drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -281,12 +281,18 @@ struct cudbg_tid_data {
281281

282282
#define CUDBG_NUM_ULPTX 11
283283
#define CUDBG_NUM_ULPTX_READ 512
284+
#define CUDBG_NUM_ULPTX_ASIC 6
285+
#define CUDBG_NUM_ULPTX_ASIC_READ 128
286+
287+
#define CUDBG_ULPTX_LA_REV 1
284288

285289
struct cudbg_ulptx_la {
286290
u32 rdptr[CUDBG_NUM_ULPTX];
287291
u32 wrptr[CUDBG_NUM_ULPTX];
288292
u32 rddata[CUDBG_NUM_ULPTX];
289293
u32 rd_data[CUDBG_NUM_ULPTX][CUDBG_NUM_ULPTX_READ];
294+
u32 rdptr_asic[CUDBG_NUM_ULPTX_ASIC_READ];
295+
u32 rddata_asic[CUDBG_NUM_ULPTX_ASIC_READ][CUDBG_NUM_ULPTX_ASIC];
290296
};
291297

292298
#define CUDBG_CHAC_PBT_ADDR 0x2800

drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c

Lines changed: 30 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2586,15 +2586,24 @@ int cudbg_collect_ulptx_la(struct cudbg_init *pdbg_init,
25862586
struct adapter *padap = pdbg_init->adap;
25872587
struct cudbg_buffer temp_buff = { 0 };
25882588
struct cudbg_ulptx_la *ulptx_la_buff;
2589+
struct cudbg_ver_hdr *ver_hdr;
25892590
u32 i, j;
25902591
int rc;
25912592

2592-
rc = cudbg_get_buff(pdbg_init, dbg_buff, sizeof(struct cudbg_ulptx_la),
2593+
rc = cudbg_get_buff(pdbg_init, dbg_buff,
2594+
sizeof(struct cudbg_ver_hdr) +
2595+
sizeof(struct cudbg_ulptx_la),
25932596
&temp_buff);
25942597
if (rc)
25952598
return rc;
25962599

2597-
ulptx_la_buff = (struct cudbg_ulptx_la *)temp_buff.data;
2600+
ver_hdr = (struct cudbg_ver_hdr *)temp_buff.data;
2601+
ver_hdr->signature = CUDBG_ENTITY_SIGNATURE;
2602+
ver_hdr->revision = CUDBG_ULPTX_LA_REV;
2603+
ver_hdr->size = sizeof(struct cudbg_ulptx_la);
2604+
2605+
ulptx_la_buff = (struct cudbg_ulptx_la *)(temp_buff.data +
2606+
sizeof(*ver_hdr));
25982607
for (i = 0; i < CUDBG_NUM_ULPTX; i++) {
25992608
ulptx_la_buff->rdptr[i] = t4_read_reg(padap,
26002609
ULP_TX_LA_RDPTR_0_A +
@@ -2610,6 +2619,25 @@ int cudbg_collect_ulptx_la(struct cudbg_init *pdbg_init,
26102619
t4_read_reg(padap,
26112620
ULP_TX_LA_RDDATA_0_A + 0x10 * i);
26122621
}
2622+
2623+
for (i = 0; i < CUDBG_NUM_ULPTX_ASIC_READ; i++) {
2624+
t4_write_reg(padap, ULP_TX_ASIC_DEBUG_CTRL_A, 0x1);
2625+
ulptx_la_buff->rdptr_asic[i] =
2626+
t4_read_reg(padap, ULP_TX_ASIC_DEBUG_CTRL_A);
2627+
ulptx_la_buff->rddata_asic[i][0] =
2628+
t4_read_reg(padap, ULP_TX_ASIC_DEBUG_0_A);
2629+
ulptx_la_buff->rddata_asic[i][1] =
2630+
t4_read_reg(padap, ULP_TX_ASIC_DEBUG_1_A);
2631+
ulptx_la_buff->rddata_asic[i][2] =
2632+
t4_read_reg(padap, ULP_TX_ASIC_DEBUG_2_A);
2633+
ulptx_la_buff->rddata_asic[i][3] =
2634+
t4_read_reg(padap, ULP_TX_ASIC_DEBUG_3_A);
2635+
ulptx_la_buff->rddata_asic[i][4] =
2636+
t4_read_reg(padap, ULP_TX_ASIC_DEBUG_4_A);
2637+
ulptx_la_buff->rddata_asic[i][5] =
2638+
t4_read_reg(padap, PM_RX_BASE_ADDR);
2639+
}
2640+
26132641
return cudbg_write_and_release_buff(pdbg_init, &temp_buff, dbg_buff);
26142642
}
26152643

drivers/net/ethernet/chelsio/cxgb4/cxgb4_cudbg.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -273,7 +273,8 @@ static u32 cxgb4_get_entity_length(struct adapter *adap, u32 entity)
273273
}
274274
break;
275275
case CUDBG_ULPTX_LA:
276-
len = sizeof(struct cudbg_ulptx_la);
276+
len = sizeof(struct cudbg_ver_hdr) +
277+
sizeof(struct cudbg_ulptx_la);
277278
break;
278279
case CUDBG_UP_CIM_INDIRECT:
279280
n = 0;

drivers/net/ethernet/chelsio/cxgb4/t4_regs.h

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1683,6 +1683,16 @@
16831683
#define ULP_TX_LA_RDPTR_0_A 0x8ec0
16841684
#define ULP_TX_LA_RDDATA_0_A 0x8ec4
16851685
#define ULP_TX_LA_WRPTR_0_A 0x8ec8
1686+
#define ULP_TX_ASIC_DEBUG_CTRL_A 0x8f70
1687+
1688+
#define ULP_TX_ASIC_DEBUG_0_A 0x8f74
1689+
#define ULP_TX_ASIC_DEBUG_1_A 0x8f78
1690+
#define ULP_TX_ASIC_DEBUG_2_A 0x8f7c
1691+
#define ULP_TX_ASIC_DEBUG_3_A 0x8f80
1692+
#define ULP_TX_ASIC_DEBUG_4_A 0x8f84
1693+
1694+
/* registers for module PM_RX */
1695+
#define PM_RX_BASE_ADDR 0x8fc0
16861696

16871697
#define PMRX_E_PCMD_PAR_ERROR_S 0
16881698
#define PMRX_E_PCMD_PAR_ERROR_V(x) ((x) << PMRX_E_PCMD_PAR_ERROR_S)

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