@@ -64,6 +64,25 @@ static inline int ceiling_fp(int32_t x)
6464 return ret ;
6565}
6666
67+ /**
68+ * struct sample - Store performance sample
69+ * @core_pct_busy: Ratio of APERF/MPERF in percent, which is actual
70+ * performance during last sample period
71+ * @busy_scaled: Scaled busy value which is used to calculate next
72+ * P state. This can be different than core_pct_busy
73+ * to account for cpu idle period
74+ * @aperf: Difference of actual performance frequency clock count
75+ * read from APERF MSR between last and current sample
76+ * @mperf: Difference of maximum performance frequency clock count
77+ * read from MPERF MSR between last and current sample
78+ * @tsc: Difference of time stamp counter between last and
79+ * current sample
80+ * @freq: Effective frequency calculated from APERF/MPERF
81+ * @time: Current time from scheduler
82+ *
83+ * This structure is used in the cpudata structure to store performance sample
84+ * data for choosing next P State.
85+ */
6786struct sample {
6887 int32_t core_pct_busy ;
6988 int32_t busy_scaled ;
@@ -74,6 +93,20 @@ struct sample {
7493 u64 time ;
7594};
7695
96+ /**
97+ * struct pstate_data - Store P state data
98+ * @current_pstate: Current requested P state
99+ * @min_pstate: Min P state possible for this platform
100+ * @max_pstate: Max P state possible for this platform
101+ * @max_pstate_physical:This is physical Max P state for a processor
102+ * This can be higher than the max_pstate which can
103+ * be limited by platform thermal design power limits
104+ * @scaling: Scaling factor to convert frequency to cpufreq
105+ * frequency units
106+ * @turbo_pstate: Max Turbo P state possible for this platform
107+ *
108+ * Stores the per cpu model P state limits and current P state.
109+ */
77110struct pstate_data {
78111 int current_pstate ;
79112 int min_pstate ;
@@ -83,13 +116,38 @@ struct pstate_data {
83116 int turbo_pstate ;
84117};
85118
119+ /**
120+ * struct vid_data - Stores voltage information data
121+ * @min: VID data for this platform corresponding to
122+ * the lowest P state
123+ * @max: VID data corresponding to the highest P State.
124+ * @turbo: VID data for turbo P state
125+ * @ratio: Ratio of (vid max - vid min) /
126+ * (max P state - Min P State)
127+ *
128+ * Stores the voltage data for DVFS (Dynamic Voltage and Frequency Scaling)
129+ * This data is used in Atom platforms, where in addition to target P state,
130+ * the voltage data needs to be specified to select next P State.
131+ */
86132struct vid_data {
87133 int min ;
88134 int max ;
89135 int turbo ;
90136 int32_t ratio ;
91137};
92138
139+ /**
140+ * struct _pid - Stores PID data
141+ * @setpoint: Target set point for busyness or performance
142+ * @integral: Storage for accumulated error values
143+ * @p_gain: PID proportional gain
144+ * @i_gain: PID integral gain
145+ * @d_gain: PID derivative gain
146+ * @deadband: PID deadband
147+ * @last_err: Last error storage for integral part of PID calculation
148+ *
149+ * Stores PID coefficients and last error for PID controller.
150+ */
93151struct _pid {
94152 int setpoint ;
95153 int32_t integral ;
@@ -100,6 +158,23 @@ struct _pid {
100158 int32_t last_err ;
101159};
102160
161+ /**
162+ * struct cpudata - Per CPU instance data storage
163+ * @cpu: CPU number for this instance data
164+ * @update_util: CPUFreq utility callback information
165+ * @pstate: Stores P state limits for this CPU
166+ * @vid: Stores VID limits for this CPU
167+ * @pid: Stores PID parameters for this CPU
168+ * @last_sample_time: Last Sample time
169+ * @prev_aperf: Last APERF value read from APERF MSR
170+ * @prev_mperf: Last MPERF value read from MPERF MSR
171+ * @prev_tsc: Last timestamp counter (TSC) value
172+ * @prev_cummulative_iowait: IO Wait time difference from last and
173+ * current sample
174+ * @sample: Storage for storing last Sample data
175+ *
176+ * This structure stores per CPU instance data for all CPUs.
177+ */
103178struct cpudata {
104179 int cpu ;
105180
@@ -118,6 +193,19 @@ struct cpudata {
118193};
119194
120195static struct cpudata * * all_cpu_data ;
196+
197+ /**
198+ * struct pid_adjust_policy - Stores static PID configuration data
199+ * @sample_rate_ms: PID calculation sample rate in ms
200+ * @sample_rate_ns: Sample rate calculation in ns
201+ * @deadband: PID deadband
202+ * @setpoint: PID Setpoint
203+ * @p_gain_pct: PID proportional gain
204+ * @i_gain_pct: PID integral gain
205+ * @d_gain_pct: PID derivative gain
206+ *
207+ * Stores per CPU model static PID configuration data.
208+ */
121209struct pstate_adjust_policy {
122210 int sample_rate_ms ;
123211 s64 sample_rate_ns ;
@@ -128,6 +216,20 @@ struct pstate_adjust_policy {
128216 int i_gain_pct ;
129217};
130218
219+ /**
220+ * struct pstate_funcs - Per CPU model specific callbacks
221+ * @get_max: Callback to get maximum non turbo effective P state
222+ * @get_max_physical: Callback to get maximum non turbo physical P state
223+ * @get_min: Callback to get minimum P state
224+ * @get_turbo: Callback to get turbo P state
225+ * @get_scaling: Callback to get frequency scaling factor
226+ * @get_val: Callback to convert P state to actual MSR write value
227+ * @get_vid: Callback to get VID data for Atom platforms
228+ * @get_target_pstate: Callback to a function to calculate next P state to use
229+ *
230+ * Core and Atom CPU models have different way to get P State limits. This
231+ * structure is used to store those callbacks.
232+ */
131233struct pstate_funcs {
132234 int (* get_max )(void );
133235 int (* get_max_physical )(void );
@@ -139,6 +241,11 @@ struct pstate_funcs {
139241 int32_t (* get_target_pstate )(struct cpudata * );
140242};
141243
244+ /**
245+ * struct cpu_defaults- Per CPU model default config data
246+ * @pid_policy: PID config data
247+ * @funcs: Callback function data
248+ */
142249struct cpu_defaults {
143250 struct pstate_adjust_policy pid_policy ;
144251 struct pstate_funcs funcs ;
@@ -151,6 +258,34 @@ static struct pstate_adjust_policy pid_params;
151258static struct pstate_funcs pstate_funcs ;
152259static int hwp_active ;
153260
261+
262+ /**
263+ * struct perf_limits - Store user and policy limits
264+ * @no_turbo: User requested turbo state from intel_pstate sysfs
265+ * @turbo_disabled: Platform turbo status either from msr
266+ * MSR_IA32_MISC_ENABLE or when maximum available pstate
267+ * matches the maximum turbo pstate
268+ * @max_perf_pct: Effective maximum performance limit in percentage, this
269+ * is minimum of either limits enforced by cpufreq policy
270+ * or limits from user set limits via intel_pstate sysfs
271+ * @min_perf_pct: Effective minimum performance limit in percentage, this
272+ * is maximum of either limits enforced by cpufreq policy
273+ * or limits from user set limits via intel_pstate sysfs
274+ * @max_perf: This is a scaled value between 0 to 255 for max_perf_pct
275+ * This value is used to limit max pstate
276+ * @min_perf: This is a scaled value between 0 to 255 for min_perf_pct
277+ * This value is used to limit min pstate
278+ * @max_policy_pct: The maximum performance in percentage enforced by
279+ * cpufreq setpolicy interface
280+ * @max_sysfs_pct: The maximum performance in percentage enforced by
281+ * intel pstate sysfs interface
282+ * @min_policy_pct: The minimum performance in percentage enforced by
283+ * cpufreq setpolicy interface
284+ * @min_sysfs_pct: The minimum performance in percentage enforced by
285+ * intel pstate sysfs interface
286+ *
287+ * Storage for user and policy defined limits.
288+ */
154289struct perf_limits {
155290 int no_turbo ;
156291 int turbo_disabled ;
0 commit comments