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ASoC: Intel: avs: ICL-based platforms support
Define handlers specific to cAVS 2.0 platforms, that is ICL, JSL and all other variants based on this very version of AudioDSP architecture. Most operations are inherited from their predecessors with the major difference being firmware-logging functionality - IPC request as well as debug memory windows layout have changed. Reviewed-by: Amadeusz Sławiński <[email protected]> Signed-off-by: Cezary Rojewski <[email protected]> Link: https://msgid.link/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
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6 files changed

+197
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‎sound/soc/intel/avs/Makefile‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
snd-soc-avs-objs := dsp.o ipc.o messages.o utils.o core.o loader.o \
44
topology.o path.o pcm.o board_selection.o control.o
55
snd-soc-avs-objs += cldma.o
6-
snd-soc-avs-objs += skl.o apl.o cnl.o
6+
snd-soc-avs-objs += skl.o apl.o cnl.o icl.o
77

88
snd-soc-avs-objs += trace.o
99
# tell define_trace.h where to find the trace header

‎sound/soc/intel/avs/avs.h‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -67,6 +67,7 @@ struct avs_dsp_ops {
6767
extern const struct avs_dsp_ops avs_skl_dsp_ops;
6868
extern const struct avs_dsp_ops avs_apl_dsp_ops;
6969
extern const struct avs_dsp_ops avs_cnl_dsp_ops;
70+
extern const struct avs_dsp_ops avs_icl_dsp_ops;
7071

7172
#define AVS_PLATATTR_CLDMA BIT_ULL(0)
7273
#define AVS_PLATATTR_IMR BIT_ULL(1)
@@ -269,11 +270,16 @@ irqreturn_t avs_skl_irq_thread(struct avs_dev *adev);
269270
irqreturn_t avs_cnl_irq_thread(struct avs_dev *adev);
270271
int avs_apl_enable_logs(struct avs_dev *adev, enum avs_log_enable enable, u32 aging_period,
271272
u32 fifo_full_period, unsigned long resource_mask, u32 *priorities);
273+
int avs_icl_enable_logs(struct avs_dev *adev, enum avs_log_enable enable, u32 aging_period,
274+
u32 fifo_full_period, unsigned long resource_mask, u32 *priorities);
272275
int avs_skl_log_buffer_offset(struct avs_dev *adev, u32 core);
276+
int avs_icl_log_buffer_offset(struct avs_dev *adev, u32 core);
273277
int avs_apl_log_buffer_status(struct avs_dev *adev, union avs_notify_msg *msg);
274278
int avs_apl_coredump(struct avs_dev *adev, union avs_notify_msg *msg);
275279
bool avs_apl_d0ix_toggle(struct avs_dev *adev, struct avs_ipc_msg *tx, bool wake);
280+
bool avs_icl_d0ix_toggle(struct avs_dev *adev, struct avs_ipc_msg *tx, bool wake);
276281
int avs_apl_set_d0ix(struct avs_dev *adev, bool enable);
282+
int avs_icl_set_d0ix(struct avs_dev *adev, bool enable);
277283

278284
/* Firmware resources management */
279285

‎sound/soc/intel/avs/core.c‎

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -808,6 +808,26 @@ static const struct avs_spec cnl_desc = {
808808
.hipc = &cnl_hipc_spec,
809809
};
810810

811+
static const struct avs_spec icl_desc = {
812+
.name = "icl",
813+
.min_fw_version = { 10, 23, 0, 5040 },
814+
.dsp_ops = &avs_icl_dsp_ops,
815+
.core_init_mask = 1,
816+
.attributes = AVS_PLATATTR_IMR,
817+
.sram = &apl_sram_spec,
818+
.hipc = &cnl_hipc_spec,
819+
};
820+
821+
static const struct avs_spec jsl_desc = {
822+
.name = "jsl",
823+
.min_fw_version = { 10, 26, 0, 5872 },
824+
.dsp_ops = &avs_icl_dsp_ops,
825+
.core_init_mask = 1,
826+
.attributes = AVS_PLATATTR_IMR,
827+
.sram = &apl_sram_spec,
828+
.hipc = &cnl_hipc_spec,
829+
};
830+
811831
static const struct pci_device_id avs_ids[] = {
812832
{ PCI_DEVICE_DATA(INTEL, HDA_SKL_LP, &skl_desc) },
813833
{ PCI_DEVICE_DATA(INTEL, HDA_SKL, &skl_desc) },
@@ -822,6 +842,10 @@ static const struct pci_device_id avs_ids[] = {
822842
{ PCI_DEVICE_DATA(INTEL, HDA_CML_LP, &cnl_desc) },
823843
{ PCI_DEVICE_DATA(INTEL, HDA_CML_H, &cnl_desc) },
824844
{ PCI_DEVICE_DATA(INTEL, HDA_RKL_S, &cnl_desc) },
845+
{ PCI_DEVICE_DATA(INTEL, HDA_ICL_LP, &icl_desc) },
846+
{ PCI_DEVICE_DATA(INTEL, HDA_ICL_N, &icl_desc) },
847+
{ PCI_DEVICE_DATA(INTEL, HDA_ICL_H, &icl_desc) },
848+
{ PCI_DEVICE_DATA(INTEL, HDA_JSL_N, &jsl_desc) },
825849
{ 0 }
826850
};
827851
MODULE_DEVICE_TABLE(pci, avs_ids);

‎sound/soc/intel/avs/icl.c‎

Lines changed: 137 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,137 @@
1+
// SPDX-License-Identifier: GPL-2.0-only
2+
//
3+
// Copyright(c) 2021-2024 Intel Corporation. All rights reserved.
4+
//
5+
// Authors: Cezary Rojewski <[email protected]>
6+
// Amadeusz Slawinski <[email protected]>
7+
//
8+
9+
#include <linux/slab.h>
10+
#include "avs.h"
11+
#include "messages.h"
12+
13+
#ifdef CONFIG_DEBUG_FS
14+
int avs_icl_enable_logs(struct avs_dev *adev, enum avs_log_enable enable, u32 aging_period,
15+
u32 fifo_full_period, unsigned long resource_mask, u32 *priorities)
16+
{
17+
struct avs_icl_log_state_info *info;
18+
u32 size, num_libs = adev->fw_cfg.max_libs_count;
19+
int i, ret;
20+
21+
if (fls_long(resource_mask) > num_libs)
22+
return -EINVAL;
23+
size = struct_size(info, logs_priorities_mask, num_libs);
24+
info = kzalloc(size, GFP_KERNEL);
25+
if (!info)
26+
return -ENOMEM;
27+
28+
info->aging_timer_period = aging_period;
29+
info->fifo_full_timer_period = fifo_full_period;
30+
info->enable = enable;
31+
if (enable)
32+
for_each_set_bit(i, &resource_mask, num_libs)
33+
info->logs_priorities_mask[i] = *priorities++;
34+
35+
ret = avs_ipc_set_enable_logs(adev, (u8 *)info, size);
36+
kfree(info);
37+
if (ret)
38+
return AVS_IPC_RET(ret);
39+
40+
return 0;
41+
}
42+
#endif
43+
44+
union avs_icl_memwnd2_slot_type {
45+
u32 val;
46+
struct {
47+
u32 resource_id:8;
48+
u32 type:24;
49+
};
50+
} __packed;
51+
52+
struct avs_icl_memwnd2_desc {
53+
u32 resource_id;
54+
union avs_icl_memwnd2_slot_type slot_id;
55+
u32 vma;
56+
} __packed;
57+
58+
#define AVS_ICL_MEMWND2_SLOTS_COUNT 15
59+
60+
struct avs_icl_memwnd2 {
61+
union {
62+
struct avs_icl_memwnd2_desc slot_desc[AVS_ICL_MEMWND2_SLOTS_COUNT];
63+
u8 rsvd[PAGE_SIZE];
64+
};
65+
u8 slot_array[AVS_ICL_MEMWND2_SLOTS_COUNT][PAGE_SIZE];
66+
} __packed;
67+
68+
#define AVS_ICL_SLOT_UNUSED \
69+
((union avs_icl_memwnd2_slot_type) { 0x00000000U })
70+
#define AVS_ICL_SLOT_CRITICAL_LOG \
71+
((union avs_icl_memwnd2_slot_type) { 0x54524300U })
72+
#define AVS_ICL_SLOT_DEBUG_LOG \
73+
((union avs_icl_memwnd2_slot_type) { 0x474f4c00U })
74+
#define AVS_ICL_SLOT_GDB_STUB \
75+
((union avs_icl_memwnd2_slot_type) { 0x42444700U })
76+
#define AVS_ICL_SLOT_BROKEN \
77+
((union avs_icl_memwnd2_slot_type) { 0x44414544U })
78+
79+
static int avs_icl_slot_offset(struct avs_dev *adev, union avs_icl_memwnd2_slot_type slot_type)
80+
{
81+
struct avs_icl_memwnd2_desc desc[AVS_ICL_MEMWND2_SLOTS_COUNT];
82+
int i;
83+
84+
memcpy_fromio(&desc, avs_sram_addr(adev, AVS_DEBUG_WINDOW), sizeof(desc));
85+
86+
for (i = 0; i < AVS_ICL_MEMWND2_SLOTS_COUNT; i++)
87+
if (desc[i].slot_id.val == slot_type.val)
88+
return offsetof(struct avs_icl_memwnd2, slot_array) +
89+
avs_skl_log_buffer_offset(adev, i);
90+
return -ENXIO;
91+
}
92+
93+
int avs_icl_log_buffer_offset(struct avs_dev *adev, u32 core)
94+
{
95+
union avs_icl_memwnd2_slot_type slot_type = AVS_ICL_SLOT_DEBUG_LOG;
96+
int ret;
97+
98+
slot_type.resource_id = core;
99+
ret = avs_icl_slot_offset(adev, slot_type);
100+
if (ret < 0)
101+
dev_dbg(adev->dev, "No slot offset found for: %x\n",
102+
slot_type.val);
103+
104+
return ret;
105+
}
106+
107+
bool avs_icl_d0ix_toggle(struct avs_dev *adev, struct avs_ipc_msg *tx, bool wake)
108+
{
109+
/* Payload-less IPCs do not take part in d0ix toggling. */
110+
return tx->size;
111+
}
112+
113+
int avs_icl_set_d0ix(struct avs_dev *adev, bool enable)
114+
{
115+
int ret;
116+
117+
ret = avs_ipc_set_d0ix(adev, enable, false);
118+
return AVS_IPC_RET(ret);
119+
}
120+
121+
const struct avs_dsp_ops avs_icl_dsp_ops = {
122+
.power = avs_dsp_core_power,
123+
.reset = avs_dsp_core_reset,
124+
.stall = avs_dsp_core_stall,
125+
.irq_handler = avs_irq_handler,
126+
.irq_thread = avs_cnl_irq_thread,
127+
.int_control = avs_dsp_interrupt_control,
128+
.load_basefw = avs_hda_load_basefw,
129+
.load_lib = avs_hda_load_library,
130+
.transfer_mods = avs_hda_transfer_modules,
131+
.log_buffer_offset = avs_icl_log_buffer_offset,
132+
.log_buffer_status = avs_apl_log_buffer_status,
133+
.coredump = avs_apl_coredump,
134+
.d0ix_toggle = avs_icl_d0ix_toggle,
135+
.set_d0ix = avs_icl_set_d0ix,
136+
AVS_SET_ENABLE_LOGS_OP(icl)
137+
};

‎sound/soc/intel/avs/messages.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -381,6 +381,7 @@ int avs_ipc_set_d0ix(struct avs_dev *adev, bool enable_pg, bool streaming)
381381

382382
msg.ext.set_d0ix.wake = enable_pg;
383383
msg.ext.set_d0ix.streaming = streaming;
384+
msg.ext.set_d0ix.prevent_pg = !enable_pg;
384385

385386
request.header = msg.val;
386387

‎sound/soc/intel/avs/messages.h‎

Lines changed: 28 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -145,8 +145,12 @@ union avs_module_msg {
145145
u32 src_queue:3;
146146
} bind_unbind;
147147
struct {
148+
/* pre-IceLake */
148149
u32 wake:1;
149150
u32 streaming:1;
151+
/* IceLake and onwards */
152+
u32 prevent_pg:1;
153+
u32 prevent_local_cg:1;
150154
} set_d0ix;
151155
} ext;
152156
};
@@ -376,6 +380,30 @@ struct avs_apl_log_state_info {
376380
struct avs_skl_log_state logs_core[];
377381
} __packed;
378382

383+
enum avs_icl_log_priority {
384+
AVS_ICL_LOG_CRITICAL = 0,
385+
AVS_ICL_LOG_HIGH,
386+
AVS_ICL_LOG_MEDIUM,
387+
AVS_ICL_LOG_LOW,
388+
AVS_ICL_LOG_VERBOSE,
389+
};
390+
391+
enum avs_icl_log_source {
392+
AVS_ICL_LOG_INFRA = 0,
393+
AVS_ICL_LOG_HAL,
394+
AVS_ICL_LOG_MODULE,
395+
AVS_ICL_LOG_AUDIO,
396+
AVS_ICL_LOG_SENSING,
397+
AVS_ICL_LOG_ULP_INFRA,
398+
};
399+
400+
struct avs_icl_log_state_info {
401+
u32 aging_timer_period;
402+
u32 fifo_full_timer_period;
403+
u32 enable;
404+
u32 logs_priorities_mask[];
405+
} __packed;
406+
379407
int avs_ipc_set_enable_logs(struct avs_dev *adev, u8 *log_info, size_t size);
380408

381409
struct avs_fw_version {

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