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Paolo Abeni
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Merge branch 'add-ethernet-driver-for-starfive-jh7110-soc'
Samin Guo says: ==================== Add Ethernet driver for StarFive JH7110 SoC This series adds ethernet support for the StarFive JH7110 RISC-V SoC, which includes a dwmac-5.20 MAC driver (from Synopsys DesignWare). This series has been tested and works fine on VisionFive-2 v1.2A and v1.3B SBC boards. For more information and support, you can visit RVspace wiki[1]. You can simply review or test the patches at the link [2]. This patchset should be applied after the patchset [3] [4]. [1]: https://wiki.rvspace.org/ [2]: https://github.com/saminGuo/linux/tree/vf2-6.3rc4-gmac-net-next [3]: https://patchwork.kernel.org/project/linux-riscv/cover/[email protected] [4]: https://patchwork.kernel.org/project/linux-riscv/cover/[email protected] ==================== Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Paolo Abeni <[email protected]>
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‎Documentation/devicetree/bindings/net/snps,dwmac.yaml

Lines changed: 13 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,7 @@ select:
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- snps,dwmac-4.10a
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- snps,dwmac-4.20a
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- snps,dwmac-5.10a
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- snps,dwmac-5.20
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- snps,dwxgmac
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- snps,dwxgmac-2.10
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@@ -90,8 +91,10 @@ properties:
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- snps,dwmac-4.10a
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- snps,dwmac-4.20a
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- snps,dwmac-5.10a
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- snps,dwmac-5.20
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- snps,dwxgmac
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- snps,dwxgmac-2.10
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- starfive,jh7110-dwmac
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reg:
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minItems: 1
@@ -134,12 +137,16 @@ properties:
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- ptp_ref
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resets:
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maxItems: 1
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description:
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MAC Reset signal.
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minItems: 1
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items:
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- description: GMAC stmmaceth reset
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- description: AHB reset
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reset-names:
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const: stmmaceth
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minItems: 1
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items:
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- const: stmmaceth
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- const: ahb
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power-domains:
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maxItems: 1
@@ -579,6 +586,7 @@ allOf:
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- snps,dwmac-3.50a
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- snps,dwmac-4.10a
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- snps,dwmac-4.20a
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- snps,dwmac-5.20
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- snps,dwxgmac
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- snps,dwxgmac-2.10
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- st,spear600-gmac
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- snps,dwmac-4.10a
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- snps,dwmac-4.20a
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- snps,dwmac-5.10a
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- snps,dwmac-5.20
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- snps,dwxgmac
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- snps,dwxgmac-2.10
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- st,spear600-gmac

‎Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml

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@@ -0,0 +1,144 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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# Copyright (C) 2022 StarFive Technology Co., Ltd.
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: StarFive JH7110 DWMAC glue layer
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maintainers:
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- Emil Renner Berthing <[email protected]>
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- Samin Guo <[email protected]>
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select:
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properties:
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compatible:
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contains:
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enum:
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- starfive,jh7110-dwmac
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required:
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- compatible
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properties:
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compatible:
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items:
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- enum:
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- starfive,jh7110-dwmac
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- const: snps,dwmac-5.20
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reg:
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maxItems: 1
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clocks:
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items:
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- description: GMAC main clock
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- description: GMAC AHB clock
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- description: PTP clock
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- description: TX clock
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- description: GTX clock
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clock-names:
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items:
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- const: stmmaceth
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- const: pclk
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- const: ptp_ref
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- const: tx
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- const: gtx
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interrupts:
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minItems: 3
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maxItems: 3
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interrupt-names:
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minItems: 3
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maxItems: 3
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resets:
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items:
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- description: MAC Reset signal.
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- description: AHB Reset signal.
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reset-names:
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items:
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- const: stmmaceth
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- const: ahb
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starfive,tx-use-rgmii-clk:
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description:
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Tx clock is provided by external rgmii clock.
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type: boolean
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starfive,syscon:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:
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- items:
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- description: phandle to syscon that configures phy mode
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- description: Offset of phy mode selection
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- description: Shift of phy mode selection
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description:
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A phandle to syscon with two arguments that configure phy mode.
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The argument one is the offset of phy mode selection, the
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argument two is the shift of phy mode selection.
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- interrupts
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- interrupt-names
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- resets
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- reset-names
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allOf:
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- $ref: snps,dwmac.yaml#
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unevaluatedProperties: false
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examples:
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- |
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ethernet@16030000 {
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compatible = "starfive,jh7110-dwmac", "snps,dwmac-5.20";
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reg = <0x16030000 0x10000>;
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clocks = <&clk 3>, <&clk 2>, <&clk 109>,
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<&clk 6>, <&clk 111>;
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clock-names = "stmmaceth", "pclk", "ptp_ref",
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"tx", "gtx";
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resets = <&rst 1>, <&rst 2>;
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reset-names = "stmmaceth", "ahb";
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interrupts = <7>, <6>, <5>;
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interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
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phy-mode = "rgmii-id";
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snps,multicast-filter-bins = <64>;
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snps,perfect-filter-entries = <8>;
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rx-fifo-depth = <2048>;
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tx-fifo-depth = <2048>;
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snps,fixed-burst;
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snps,no-pbl-x8;
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snps,tso;
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snps,force_thresh_dma_mode;
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snps,axi-config = <&stmmac_axi_setup>;
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snps,en-tx-lpi-clockgating;
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snps,txpbl = <16>;
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snps,rxpbl = <16>;
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starfive,syscon = <&aon_syscon 0xc 0x12>;
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phy-handle = <&phy0>;
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "snps,dwmac-mdio";
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phy0: ethernet-phy@0 {
134+
reg = <0>;
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};
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};
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stmmac_axi_setup: stmmac-axi-config {
139+
snps,lpi_en;
140+
snps,wr_osr_lmt = <4>;
141+
snps,rd_osr_lmt = <4>;
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snps,blen = <256 128 64 32 0 0 0>;
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};
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};

‎MAINTAINERS

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Original file line numberDiff line numberDiff line change
@@ -19928,6 +19928,13 @@ M: Emil Renner Berthing <[email protected]>
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S: Maintained
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F: arch/riscv/boot/dts/starfive/
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STARFIVE DWMAC GLUE LAYER
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M: Emil Renner Berthing <[email protected]>
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M: Samin Guo <[email protected]>
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S: Maintained
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F: Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml
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F: drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c
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1993119938
STARFIVE JH7100 CLOCK DRIVERS
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M: Emil Renner Berthing <[email protected]>
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S: Maintained

‎drivers/net/ethernet/stmicro/stmmac/Kconfig

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@@ -165,6 +165,18 @@ config DWMAC_SOCFPGA
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for the stmmac device driver. This driver is used for
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arria5 and cyclone5 FPGA SoCs.
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168+
config DWMAC_STARFIVE
169+
tristate "StarFive dwmac support"
170+
depends on OF && (ARCH_STARFIVE || COMPILE_TEST)
171+
select MFD_SYSCON
172+
default m if ARCH_STARFIVE
173+
help
174+
Support for ethernet controllers on StarFive RISC-V SoCs
175+
176+
This selects the StarFive platform specific glue layer support for
177+
the stmmac device driver. This driver is used for StarFive JH7110
178+
ethernet controller.
179+
168180
config DWMAC_STI
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tristate "STi GMAC support"
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default ARCH_STI

‎drivers/net/ethernet/stmicro/stmmac/Makefile

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@@ -23,6 +23,7 @@ obj-$(CONFIG_DWMAC_OXNAS) += dwmac-oxnas.o
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obj-$(CONFIG_DWMAC_QCOM_ETHQOS) += dwmac-qcom-ethqos.o
2424
obj-$(CONFIG_DWMAC_ROCKCHIP) += dwmac-rk.o
2525
obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o
26+
obj-$(CONFIG_DWMAC_STARFIVE) += dwmac-starfive.o
2627
obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o
2728
obj-$(CONFIG_DWMAC_STM32) += dwmac-stm32.o
2829
obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o

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