@@ -2159,6 +2159,46 @@ static void serial8250_startup_special(struct uart_port *port)
21592159 }
21602160}
21612161
2162+ static void serial8250_set_TRG_levels (struct uart_port * port )
2163+ {
2164+ struct uart_8250_port * up = up_to_u8250p (port );
2165+
2166+ switch (port -> type ) {
2167+ /* For a XR16C850, we need to set the trigger levels */
2168+ case PORT_16850 : {
2169+ u8 fctr ;
2170+
2171+ serial_out (up , UART_LCR , UART_LCR_CONF_MODE_B );
2172+
2173+ fctr = serial_in (up , UART_FCTR ) & ~(UART_FCTR_RX |UART_FCTR_TX );
2174+ fctr |= UART_FCTR_TRGD ;
2175+ serial_port_out (port , UART_FCTR , fctr | UART_FCTR_RX );
2176+ serial_port_out (port , UART_TRG , UART_TRG_96 );
2177+ serial_port_out (port , UART_FCTR , fctr | UART_FCTR_TX );
2178+ serial_port_out (port , UART_TRG , UART_TRG_96 );
2179+
2180+ serial_port_out (port , UART_LCR , 0 );
2181+ break ;
2182+ }
2183+ /* For the Altera 16550 variants, set TX threshold trigger level. */
2184+ case PORT_ALTR_16550_F32 :
2185+ case PORT_ALTR_16550_F64 :
2186+ case PORT_ALTR_16550_F128 :
2187+ if (port -> fifosize <= 1 )
2188+ return ;
2189+
2190+ /* Bounds checking of TX threshold (valid 0 to fifosize-2) */
2191+ if (up -> tx_loadsz < 2 || up -> tx_loadsz > port -> fifosize ) {
2192+ dev_err (port -> dev , "TX FIFO Threshold errors, skipping\n" );
2193+ return ;
2194+ }
2195+ serial_port_out (port , UART_ALTR_AFR , UART_ALTR_EN_TXFIFO_LW );
2196+ serial_port_out (port , UART_ALTR_TX_LOW , port -> fifosize - up -> tx_loadsz );
2197+ port -> handle_irq = serial8250_tx_threshold_handle_irq ;
2198+ break ;
2199+ }
2200+ }
2201+
21622202int serial8250_do_startup (struct uart_port * port )
21632203{
21642204 struct uart_8250_port * up = up_to_u8250p (port );
@@ -2208,42 +2248,7 @@ int serial8250_do_startup(struct uart_port *port)
22082248 goto out ;
22092249 }
22102250
2211- /*
2212- * For a XR16C850, we need to set the trigger levels
2213- */
2214- if (port -> type == PORT_16850 ) {
2215- unsigned char fctr ;
2216-
2217- serial_out (up , UART_LCR , UART_LCR_CONF_MODE_B );
2218-
2219- fctr = serial_in (up , UART_FCTR ) & ~(UART_FCTR_RX |UART_FCTR_TX );
2220- serial_port_out (port , UART_FCTR ,
2221- fctr | UART_FCTR_TRGD | UART_FCTR_RX );
2222- serial_port_out (port , UART_TRG , UART_TRG_96 );
2223- serial_port_out (port , UART_FCTR ,
2224- fctr | UART_FCTR_TRGD | UART_FCTR_TX );
2225- serial_port_out (port , UART_TRG , UART_TRG_96 );
2226-
2227- serial_port_out (port , UART_LCR , 0 );
2228- }
2229-
2230- /*
2231- * For the Altera 16550 variants, set TX threshold trigger level.
2232- */
2233- if (((port -> type == PORT_ALTR_16550_F32 ) ||
2234- (port -> type == PORT_ALTR_16550_F64 ) ||
2235- (port -> type == PORT_ALTR_16550_F128 )) && (port -> fifosize > 1 )) {
2236- /* Bounds checking of TX threshold (valid 0 to fifosize-2) */
2237- if ((up -> tx_loadsz < 2 ) || (up -> tx_loadsz > port -> fifosize )) {
2238- dev_err (port -> dev , "TX FIFO Threshold errors, skipping\n" );
2239- } else {
2240- serial_port_out (port , UART_ALTR_AFR ,
2241- UART_ALTR_EN_TXFIFO_LW );
2242- serial_port_out (port , UART_ALTR_TX_LOW ,
2243- port -> fifosize - up -> tx_loadsz );
2244- port -> handle_irq = serial8250_tx_threshold_handle_irq ;
2245- }
2246- }
2251+ serial8250_set_TRG_levels (port );
22472252
22482253 /* Check if we need to have shared IRQs */
22492254 if (port -> irq && (up -> port .flags & UPF_SHARE_IRQ ))
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