Skip to content

Commit c439c33

Browse files
Loic Poulaingregkh
authored andcommitted
8250_dw: Support all baudrates on baytrail
In the same manner as 8250_pci, 8250_dw needs some baytrail specific quirks to be used. The reference clock needs to be adjusted before divided in order to have the minimum error rate on the baudrate. The specific byt set termios function is stored in the driver_data field of the acpi device id via the dw8250_acpi_desc structure. Remove the uartclk field which is no longer delivered as driver data. Signed-off-by: Loic Poulain <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
1 parent 50d16ca commit c439c33

File tree

1 file changed

+77
-4
lines changed

1 file changed

+77
-4
lines changed

drivers/tty/serial/8250/8250_dw.c

Lines changed: 77 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -62,6 +62,70 @@ struct dw8250_data {
6262
struct uart_8250_dma dma;
6363
};
6464

65+
struct dw8250_acpi_desc {
66+
void (*set_termios)(struct uart_port *p, struct ktermios *termios,
67+
struct ktermios *old);
68+
};
69+
70+
#define BYT_PRV_CLK 0x800
71+
#define BYT_PRV_CLK_EN (1 << 0)
72+
#define BYT_PRV_CLK_M_VAL_SHIFT 1
73+
#define BYT_PRV_CLK_N_VAL_SHIFT 16
74+
#define BYT_PRV_CLK_UPDATE (1 << 31)
75+
76+
static void byt_set_termios(struct uart_port *p, struct ktermios *termios,
77+
struct ktermios *old)
78+
{
79+
unsigned int baud = tty_termios_baud_rate(termios);
80+
unsigned int m, n;
81+
u32 reg;
82+
83+
/*
84+
* For baud rates 0.5M, 1M, 1.5M, 2M, 2.5M, 3M, 3.5M and 4M the
85+
* dividers must be adjusted.
86+
*
87+
* uartclk = (m / n) * 100 MHz, where m <= n
88+
*/
89+
switch (baud) {
90+
case 500000:
91+
case 1000000:
92+
case 2000000:
93+
case 4000000:
94+
m = 64;
95+
n = 100;
96+
p->uartclk = 64000000;
97+
break;
98+
case 3500000:
99+
m = 56;
100+
n = 100;
101+
p->uartclk = 56000000;
102+
break;
103+
case 1500000:
104+
case 3000000:
105+
m = 48;
106+
n = 100;
107+
p->uartclk = 48000000;
108+
break;
109+
case 2500000:
110+
m = 40;
111+
n = 100;
112+
p->uartclk = 40000000;
113+
break;
114+
default:
115+
m = 2304;
116+
n = 3125;
117+
p->uartclk = 73728000;
118+
}
119+
120+
/* Reset the clock */
121+
reg = (m << BYT_PRV_CLK_M_VAL_SHIFT) | (n << BYT_PRV_CLK_N_VAL_SHIFT);
122+
writel(reg, p->membase + BYT_PRV_CLK);
123+
reg |= BYT_PRV_CLK_EN | BYT_PRV_CLK_UPDATE;
124+
writel(reg, p->membase + BYT_PRV_CLK);
125+
126+
serial8250_do_set_termios(p, termios, old);
127+
}
128+
65129
static inline int dw8250_modify_msr(struct uart_port *p, int offset, int value)
66130
{
67131
struct dw8250_data *d = p->private_data;
@@ -278,6 +342,7 @@ static int dw8250_probe_acpi(struct uart_8250_port *up,
278342
{
279343
const struct acpi_device_id *id;
280344
struct uart_port *p = &up->port;
345+
struct dw8250_acpi_desc *acpi_desc;
281346

282347
dw8250_setup_port(up);
283348

@@ -290,14 +355,18 @@ static int dw8250_probe_acpi(struct uart_8250_port *up,
290355
p->serial_out = dw8250_serial_out32;
291356
p->regshift = 2;
292357

293-
if (!p->uartclk)
294-
p->uartclk = (unsigned int)id->driver_data;
295-
296358
up->dma = &data->dma;
297359

298360
up->dma->rxconf.src_maxburst = p->fifosize / 4;
299361
up->dma->txconf.dst_maxburst = p->fifosize / 4;
300362

363+
acpi_desc = (struct dw8250_acpi_desc *)id->driver_data;
364+
if (!acpi_desc)
365+
return 0;
366+
367+
if (acpi_desc->set_termios)
368+
p->set_termios = acpi_desc->set_termios;
369+
301370
return 0;
302371
}
303372

@@ -445,12 +514,16 @@ static const struct of_device_id dw8250_of_match[] = {
445514
};
446515
MODULE_DEVICE_TABLE(of, dw8250_of_match);
447516

517+
static struct dw8250_acpi_desc byt_8250_desc = {
518+
.set_termios = byt_set_termios,
519+
};
520+
448521
static const struct acpi_device_id dw8250_acpi_match[] = {
449522
{ "INT33C4", 0 },
450523
{ "INT33C5", 0 },
451524
{ "INT3434", 0 },
452525
{ "INT3435", 0 },
453-
{ "80860F0A", 0 },
526+
{ "80860F0A", (kernel_ulong_t)&byt_8250_desc},
454527
{ },
455528
};
456529
MODULE_DEVICE_TABLE(acpi, dw8250_acpi_match);

0 commit comments

Comments
 (0)