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Hariprasad Shenaidavem330
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cxgb4: Use FW LDST cmd to access TP_PIO_{ADDR, DATA} register first
The TP_PIO_{ADDR,DATA} registers are are in conflict with the firmware's use of these registers. Added a routine to access it through FW LDST cmd. Access all TP_PIO_{ADDR,DATA} register access through new routine if FW is alive. If firmware is dead, than fall back to indirect access. Signed-off-by: Hariprasad Shenai <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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+83
-21
lines changed

2 files changed

+83
-21
lines changed

drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4068,8 +4068,8 @@ static int adap_init0(struct adapter *adap)
40684068
adap->params.b_wnd);
40694069
}
40704070
t4_init_sge_params(adap);
4071-
t4_init_tp_params(adap);
40724071
adap->flags |= FW_OK;
4072+
t4_init_tp_params(adap);
40734073
return 0;
40744074

40754075
/*

drivers/net/ethernet/chelsio/cxgb4/t4_hw.c

Lines changed: 82 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -3632,6 +3632,40 @@ int t4_read_rss(struct adapter *adapter, u16 *map)
36323632
return 0;
36333633
}
36343634

3635+
/**
3636+
* t4_fw_tp_pio_rw - Access TP PIO through LDST
3637+
* @adap: the adapter
3638+
* @vals: where the indirect register values are stored/written
3639+
* @nregs: how many indirect registers to read/write
3640+
* @start_idx: index of first indirect register to read/write
3641+
* @rw: Read (1) or Write (0)
3642+
*
3643+
* Access TP PIO registers through LDST
3644+
*/
3645+
static void t4_fw_tp_pio_rw(struct adapter *adap, u32 *vals, unsigned int nregs,
3646+
unsigned int start_index, unsigned int rw)
3647+
{
3648+
int ret, i;
3649+
int cmd = FW_LDST_ADDRSPC_TP_PIO;
3650+
struct fw_ldst_cmd c;
3651+
3652+
for (i = 0 ; i < nregs; i++) {
3653+
memset(&c, 0, sizeof(c));
3654+
c.op_to_addrspace = cpu_to_be32(FW_CMD_OP_V(FW_LDST_CMD) |
3655+
FW_CMD_REQUEST_F |
3656+
(rw ? FW_CMD_READ_F :
3657+
FW_CMD_WRITE_F) |
3658+
FW_LDST_CMD_ADDRSPACE_V(cmd));
3659+
c.cycles_to_len16 = cpu_to_be32(FW_LEN16(c));
3660+
3661+
c.u.addrval.addr = cpu_to_be32(start_index + i);
3662+
c.u.addrval.val = rw ? 0 : cpu_to_be32(vals[i]);
3663+
ret = t4_wr_mbox(adap, adap->mbox, &c, sizeof(c), &c);
3664+
if (!ret && rw)
3665+
vals[i] = be32_to_cpu(c.u.addrval.val);
3666+
}
3667+
}
3668+
36353669
/**
36363670
* t4_read_rss_key - read the global RSS key
36373671
* @adap: the adapter
@@ -3641,8 +3675,11 @@ int t4_read_rss(struct adapter *adapter, u16 *map)
36413675
*/
36423676
void t4_read_rss_key(struct adapter *adap, u32 *key)
36433677
{
3644-
t4_read_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A, key, 10,
3645-
TP_RSS_SECRET_KEY0_A);
3678+
if (adap->flags & FW_OK)
3679+
t4_fw_tp_pio_rw(adap, key, 10, TP_RSS_SECRET_KEY0_A, 1);
3680+
else
3681+
t4_read_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A, key, 10,
3682+
TP_RSS_SECRET_KEY0_A);
36463683
}
36473684

36483685
/**
@@ -3668,8 +3705,11 @@ void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx)
36683705
(vrt & KEYEXTEND_F) && (KEYMODE_G(vrt) == 3))
36693706
rss_key_addr_cnt = 32;
36703707

3671-
t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A, key, 10,
3672-
TP_RSS_SECRET_KEY0_A);
3708+
if (adap->flags & FW_OK)
3709+
t4_fw_tp_pio_rw(adap, (void *)key, 10, TP_RSS_SECRET_KEY0_A, 0);
3710+
else
3711+
t4_write_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A, key, 10,
3712+
TP_RSS_SECRET_KEY0_A);
36733713

36743714
if (idx >= 0 && idx < rss_key_addr_cnt) {
36753715
if (rss_key_addr_cnt > 16)
@@ -3694,8 +3734,12 @@ void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx)
36943734
void t4_read_rss_pf_config(struct adapter *adapter, unsigned int index,
36953735
u32 *valp)
36963736
{
3697-
t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
3698-
valp, 1, TP_RSS_PF0_CONFIG_A + index);
3737+
if (adapter->flags & FW_OK)
3738+
t4_fw_tp_pio_rw(adapter, valp, 1,
3739+
TP_RSS_PF0_CONFIG_A + index, 1);
3740+
else
3741+
t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
3742+
valp, 1, TP_RSS_PF0_CONFIG_A + index);
36993743
}
37003744

37013745
/**
@@ -3730,10 +3774,15 @@ void t4_read_rss_vf_config(struct adapter *adapter, unsigned int index,
37303774

37313775
/* Grab the VFL/VFH values ...
37323776
*/
3733-
t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
3734-
vfl, 1, TP_RSS_VFL_CONFIG_A);
3735-
t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
3736-
vfh, 1, TP_RSS_VFH_CONFIG_A);
3777+
if (adapter->flags & FW_OK) {
3778+
t4_fw_tp_pio_rw(adapter, vfl, 1, TP_RSS_VFL_CONFIG_A, 1);
3779+
t4_fw_tp_pio_rw(adapter, vfh, 1, TP_RSS_VFH_CONFIG_A, 1);
3780+
} else {
3781+
t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
3782+
vfl, 1, TP_RSS_VFL_CONFIG_A);
3783+
t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
3784+
vfh, 1, TP_RSS_VFH_CONFIG_A);
3785+
}
37373786
}
37383787

37393788
/**
@@ -3746,8 +3795,11 @@ u32 t4_read_rss_pf_map(struct adapter *adapter)
37463795
{
37473796
u32 pfmap;
37483797

3749-
t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
3750-
&pfmap, 1, TP_RSS_PF_MAP_A);
3798+
if (adapter->flags & FW_OK)
3799+
t4_fw_tp_pio_rw(adapter, &pfmap, 1, TP_RSS_PF_MAP_A, 1);
3800+
else
3801+
t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
3802+
&pfmap, 1, TP_RSS_PF_MAP_A);
37513803
return pfmap;
37523804
}
37533805

@@ -3761,8 +3813,11 @@ u32 t4_read_rss_pf_mask(struct adapter *adapter)
37613813
{
37623814
u32 pfmask;
37633815

3764-
t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
3765-
&pfmask, 1, TP_RSS_PF_MSK_A);
3816+
if (adapter->flags & FW_OK)
3817+
t4_fw_tp_pio_rw(adapter, &pfmask, 1, TP_RSS_PF_MSK_A, 1);
3818+
else
3819+
t4_read_indirect(adapter, TP_PIO_ADDR_A, TP_PIO_DATA_A,
3820+
&pfmask, 1, TP_RSS_PF_MSK_A);
37663821
return pfmask;
37673822
}
37683823

@@ -6137,12 +6192,19 @@ int t4_init_tp_params(struct adapter *adap)
61376192
/* Cache the adapter's Compressed Filter Mode and global Incress
61386193
* Configuration.
61396194
*/
6140-
t4_read_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,
6141-
&adap->params.tp.vlan_pri_map, 1,
6142-
TP_VLAN_PRI_MAP_A);
6143-
t4_read_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,
6144-
&adap->params.tp.ingress_config, 1,
6145-
TP_INGRESS_CONFIG_A);
6195+
if (adap->flags & FW_OK) {
6196+
t4_fw_tp_pio_rw(adap, &adap->params.tp.vlan_pri_map, 1,
6197+
TP_VLAN_PRI_MAP_A, 1);
6198+
t4_fw_tp_pio_rw(adap, &adap->params.tp.ingress_config, 1,
6199+
TP_INGRESS_CONFIG_A, 1);
6200+
} else {
6201+
t4_read_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,
6202+
&adap->params.tp.vlan_pri_map, 1,
6203+
TP_VLAN_PRI_MAP_A);
6204+
t4_read_indirect(adap, TP_PIO_ADDR_A, TP_PIO_DATA_A,
6205+
&adap->params.tp.ingress_config, 1,
6206+
TP_INGRESS_CONFIG_A);
6207+
}
61466208

61476209
/* Now that we have TP_VLAN_PRI_MAP cached, we can calculate the field
61486210
* shift positions of several elements of the Compressed Filter Tuple

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