2525
2626#include "hantro_hw.h"
2727
28+ #define VP8_MB_DIM 16
29+ #define VP8_MB_WIDTH (w ) DIV_ROUND_UP(w, VP8_MB_DIM)
30+ #define VP8_MB_HEIGHT (h ) DIV_ROUND_UP(h, VP8_MB_DIM)
31+
2832#define MPEG2_MB_DIM 16
2933#define MPEG2_MB_WIDTH (w ) DIV_ROUND_UP(w, MPEG2_MB_DIM)
3034#define MPEG2_MB_HEIGHT (h ) DIV_ROUND_UP(h, MPEG2_MB_DIM)
@@ -40,6 +44,7 @@ struct hantro_codec_ops;
4044#define HANTRO_ENCODERS 0x0000ffff
4145
4246#define HANTRO_MPEG2_DECODER BIT(16)
47+ #define HANTRO_VP8_DECODER BIT(17)
4348#define HANTRO_DECODERS 0xffff0000
4449
4550/**
@@ -97,11 +102,13 @@ struct hantro_variant {
97102 * @HANTRO_MODE_NONE: No operating mode. Used for RAW video formats.
98103 * @HANTRO_MODE_JPEG_ENC: JPEG encoder.
99104 * @HANTRO_MODE_MPEG2_DEC: MPEG-2 decoder.
105+ * @HANTRO_MODE_VP8_DEC: VP8 decoder.
100106 */
101107enum hantro_codec_mode {
102108 HANTRO_MODE_NONE = -1 ,
103109 HANTRO_MODE_JPEG_ENC ,
104110 HANTRO_MODE_MPEG2_DEC ,
111+ HANTRO_MODE_VP8_DEC ,
105112};
106113
107114/*
@@ -215,6 +222,7 @@ struct hantro_dev {
215222 * @codec_ops: Set of operations related to codec mode.
216223 * @jpeg_enc: JPEG-encoding context.
217224 * @mpeg2_dec: MPEG-2-decoding context.
225+ * @vp8_dec: VP8-decoding context.
218226 */
219227struct hantro_ctx {
220228 struct hantro_dev * dev ;
@@ -241,6 +249,7 @@ struct hantro_ctx {
241249 union {
242250 struct hantro_jpeg_enc_hw_ctx jpeg_enc ;
243251 struct hantro_mpeg2_dec_hw_ctx mpeg2_dec ;
252+ struct hantro_vp8_dec_hw_ctx vp8_dec ;
244253 };
245254};
246255
@@ -265,6 +274,12 @@ struct hantro_fmt {
265274 struct v4l2_frmsize_stepwise frmsize ;
266275};
267276
277+ struct hantro_reg {
278+ u32 base ;
279+ u32 shift ;
280+ u32 mask ;
281+ };
282+
268283/* Logging helpers */
269284
270285/**
@@ -343,6 +358,18 @@ static inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg)
343358 return val ;
344359}
345360
361+ static inline void hantro_reg_write (struct hantro_dev * vpu ,
362+ const struct hantro_reg * reg ,
363+ u32 val )
364+ {
365+ u32 v ;
366+
367+ v = vdpu_read (vpu , reg -> base );
368+ v &= ~(reg -> mask << reg -> shift );
369+ v |= ((val & reg -> mask ) << reg -> shift );
370+ vdpu_write_relaxed (vpu , v , reg -> base );
371+ }
372+
346373bool hantro_is_encoder_ctx (const struct hantro_ctx * ctx );
347374
348375void * hantro_get_ctrl (struct hantro_ctx * ctx , u32 id );
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