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mikey
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KVM: PPC: Book3S HV: Context-switch new POWER8 SPRs
This adds fields to the struct kvm_vcpu_arch to store the new guest-accessible SPRs on POWER8, adds code to the get/set_one_reg functions to allow userspace to access this state, and adds code to the guest entry and exit to context-switch these SPRs between host and guest. Note that DPDES (Directed Privileged Doorbell Exception State) is shared between threads on a core; hence we store it in struct kvmppc_vcore and have the master thread save and restore it. Signed-off-by: Michael Neuling <[email protected]> Signed-off-by: Paul Mackerras <[email protected]> Signed-off-by: Alexander Graf <[email protected]>
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6 files changed

+361
-3
lines changed

6 files changed

+361
-3
lines changed

‎arch/powerpc/include/asm/kvm_host.h‎

Lines changed: 24 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -304,6 +304,7 @@ struct kvmppc_vcore {
304304
ulong lpcr;
305305
u32 arch_compat;
306306
ulong pcr;
307+
ulong dpdes; /* doorbell state (POWER8) */
307308
};
308309

309310
#define VCORE_ENTRY_COUNT(vc) ((vc)->entry_exit_count & 0xff)
@@ -448,6 +449,7 @@ struct kvm_vcpu_arch {
448449
ulong pc;
449450
ulong ctr;
450451
ulong lr;
452+
ulong tar;
451453

452454
ulong xer;
453455
u32 cr;
@@ -457,13 +459,32 @@ struct kvm_vcpu_arch {
457459
ulong guest_owned_ext;
458460
ulong purr;
459461
ulong spurr;
462+
ulong ic;
463+
ulong vtb;
460464
ulong dscr;
461465
ulong amr;
462466
ulong uamor;
467+
ulong iamr;
463468
u32 ctrl;
464469
ulong dabr;
470+
ulong dawr;
471+
ulong dawrx;
472+
ulong ciabr;
465473
ulong cfar;
466474
ulong ppr;
475+
ulong pspb;
476+
ulong fscr;
477+
ulong tfhar;
478+
ulong tfiar;
479+
ulong texasr;
480+
ulong ebbhr;
481+
ulong ebbrr;
482+
ulong bescr;
483+
ulong csigr;
484+
ulong tacr;
485+
ulong tcscr;
486+
ulong acop;
487+
ulong wort;
467488
ulong shadow_srr1;
468489
#endif
469490
u32 vrsave; /* also USPRG0 */
@@ -498,10 +519,12 @@ struct kvm_vcpu_arch {
498519
u32 ccr1;
499520
u32 dbsr;
500521

501-
u64 mmcr[3];
522+
u64 mmcr[5];
502523
u32 pmc[8];
524+
u32 spmc[2];
503525
u64 siar;
504526
u64 sdar;
527+
u64 sier;
505528

506529
#ifdef CONFIG_KVM_EXIT_TIMING
507530
struct mutex exit_timing_lock;

‎arch/powerpc/include/asm/reg.h‎

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -223,6 +223,11 @@
223223
#define CTRL_TE 0x00c00000 /* thread enable */
224224
#define CTRL_RUNLATCH 0x1
225225
#define SPRN_DAWR 0xB4
226+
#define SPRN_CIABR 0xBB
227+
#define CIABR_PRIV 0x3
228+
#define CIABR_PRIV_USER 1
229+
#define CIABR_PRIV_SUPER 2
230+
#define CIABR_PRIV_HYPER 3
226231
#define SPRN_DAWRX 0xBC
227232
#define DAWRX_USER (1UL << 0)
228233
#define DAWRX_KERNEL (1UL << 1)
@@ -260,6 +265,8 @@
260265
#define SPRN_HRMOR 0x139 /* Real mode offset register */
261266
#define SPRN_HSRR0 0x13A /* Hypervisor Save/Restore 0 */
262267
#define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */
268+
#define SPRN_IC 0x350 /* Virtual Instruction Count */
269+
#define SPRN_VTB 0x351 /* Virtual Time Base */
263270
/* HFSCR and FSCR bit numbers are the same */
264271
#define FSCR_TAR_LG 8 /* Enable Target Address Register */
265272
#define FSCR_EBB_LG 7 /* Enable Event Based Branching */
@@ -368,6 +375,8 @@
368375
#define DER_EBRKE 0x00000002 /* External Breakpoint Interrupt */
369376
#define DER_DPIE 0x00000001 /* Dev. Port Nonmaskable Request */
370377
#define SPRN_DMISS 0x3D0 /* Data TLB Miss Register */
378+
#define SPRN_DHDES 0x0B1 /* Directed Hyp. Doorbell Exc. State */
379+
#define SPRN_DPDES 0x0B0 /* Directed Priv. Doorbell Exc. State */
371380
#define SPRN_EAR 0x11A /* External Address Register */
372381
#define SPRN_HASH1 0x3D2 /* Primary Hash Address Register */
373382
#define SPRN_HASH2 0x3D3 /* Secondary Hash Address Resgister */
@@ -427,6 +436,7 @@
427436
#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */
428437
#define SPRN_IABR2 0x3FA /* 83xx */
429438
#define SPRN_IBCR 0x135 /* 83xx Insn Breakpoint Control Reg */
439+
#define SPRN_IAMR 0x03D /* Instr. Authority Mask Reg */
430440
#define SPRN_HID4 0x3F4 /* 970 HID4 */
431441
#define HID4_LPES0 (1ul << (63-0)) /* LPAR env. sel. bit 0 */
432442
#define HID4_RMLS2_SH (63 - 2) /* Real mode limit bottom 2 bits */
@@ -541,6 +551,7 @@
541551
#define SPRN_PIR 0x3FF /* Processor Identification Register */
542552
#endif
543553
#define SPRN_TIR 0x1BE /* Thread Identification Register */
554+
#define SPRN_PSPB 0x09F /* Problem State Priority Boost reg */
544555
#define SPRN_PTEHI 0x3D5 /* 981 7450 PTE HI word (S/W TLB load) */
545556
#define SPRN_PTELO 0x3D6 /* 982 7450 PTE LO word (S/W TLB load) */
546557
#define SPRN_PURR 0x135 /* Processor Utilization of Resources Reg */
@@ -682,6 +693,7 @@
682693
#define SPRN_EBBHR 804 /* Event based branch handler register */
683694
#define SPRN_EBBRR 805 /* Event based branch return register */
684695
#define SPRN_BESCR 806 /* Branch event status and control register */
696+
#define SPRN_WORT 895 /* Workload optimization register - thread */
685697

686698
#define SPRN_PMC1 787
687699
#define SPRN_PMC2 788
@@ -698,6 +710,11 @@
698710
#define SIER_SIHV 0x1000000 /* Sampled MSR_HV */
699711
#define SIER_SIAR_VALID 0x0400000 /* SIAR contents valid */
700712
#define SIER_SDAR_VALID 0x0200000 /* SDAR contents valid */
713+
#define SPRN_TACR 888
714+
#define SPRN_TCSCR 889
715+
#define SPRN_CSIGR 890
716+
#define SPRN_SPMC1 892
717+
#define SPRN_SPMC2 893
701718

702719
/* When EBB is enabled, some of MMCR0/MMCR2/SIER are user accessible */
703720
#define MMCR0_USER_MASK (MMCR0_FC | MMCR0_PMXE | MMCR0_PMAO)

‎arch/powerpc/include/uapi/asm/kvm.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -545,6 +545,7 @@ struct kvm_get_htab_header {
545545
#define KVM_REG_PPC_TCSCR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb1)
546546
#define KVM_REG_PPC_PID (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb2)
547547
#define KVM_REG_PPC_ACOP (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb3)
548+
#define KVM_REG_PPC_WORT (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb4)
548549

549550
#define KVM_REG_PPC_VRSAVE (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb4)
550551
#define KVM_REG_PPC_LPCR (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb5)

‎arch/powerpc/kernel/asm-offsets.c‎

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -432,6 +432,7 @@ int main(void)
432432
DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
433433
DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
434434
DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
435+
DEFINE(VCPU_TAR, offsetof(struct kvm_vcpu, arch.tar));
435436
DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
436437
DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
437438
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
@@ -484,11 +485,17 @@ int main(void)
484485
DEFINE(VCPU_VCPUID, offsetof(struct kvm_vcpu, vcpu_id));
485486
DEFINE(VCPU_PURR, offsetof(struct kvm_vcpu, arch.purr));
486487
DEFINE(VCPU_SPURR, offsetof(struct kvm_vcpu, arch.spurr));
488+
DEFINE(VCPU_IC, offsetof(struct kvm_vcpu, arch.ic));
489+
DEFINE(VCPU_VTB, offsetof(struct kvm_vcpu, arch.vtb));
487490
DEFINE(VCPU_DSCR, offsetof(struct kvm_vcpu, arch.dscr));
488491
DEFINE(VCPU_AMR, offsetof(struct kvm_vcpu, arch.amr));
489492
DEFINE(VCPU_UAMOR, offsetof(struct kvm_vcpu, arch.uamor));
493+
DEFINE(VCPU_IAMR, offsetof(struct kvm_vcpu, arch.iamr));
490494
DEFINE(VCPU_CTRL, offsetof(struct kvm_vcpu, arch.ctrl));
491495
DEFINE(VCPU_DABR, offsetof(struct kvm_vcpu, arch.dabr));
496+
DEFINE(VCPU_DAWR, offsetof(struct kvm_vcpu, arch.dawr));
497+
DEFINE(VCPU_DAWRX, offsetof(struct kvm_vcpu, arch.dawrx));
498+
DEFINE(VCPU_CIABR, offsetof(struct kvm_vcpu, arch.ciabr));
492499
DEFINE(VCPU_HFLAGS, offsetof(struct kvm_vcpu, arch.hflags));
493500
DEFINE(VCPU_DEC, offsetof(struct kvm_vcpu, arch.dec));
494501
DEFINE(VCPU_DEC_EXPIRES, offsetof(struct kvm_vcpu, arch.dec_expires));
@@ -497,8 +504,10 @@ int main(void)
497504
DEFINE(VCPU_PRODDED, offsetof(struct kvm_vcpu, arch.prodded));
498505
DEFINE(VCPU_MMCR, offsetof(struct kvm_vcpu, arch.mmcr));
499506
DEFINE(VCPU_PMC, offsetof(struct kvm_vcpu, arch.pmc));
507+
DEFINE(VCPU_SPMC, offsetof(struct kvm_vcpu, arch.spmc));
500508
DEFINE(VCPU_SIAR, offsetof(struct kvm_vcpu, arch.siar));
501509
DEFINE(VCPU_SDAR, offsetof(struct kvm_vcpu, arch.sdar));
510+
DEFINE(VCPU_SIER, offsetof(struct kvm_vcpu, arch.sier));
502511
DEFINE(VCPU_SLB, offsetof(struct kvm_vcpu, arch.slb));
503512
DEFINE(VCPU_SLB_MAX, offsetof(struct kvm_vcpu, arch.slb_max));
504513
DEFINE(VCPU_SLB_NR, offsetof(struct kvm_vcpu, arch.slb_nr));
@@ -508,6 +517,19 @@ int main(void)
508517
DEFINE(VCPU_TRAP, offsetof(struct kvm_vcpu, arch.trap));
509518
DEFINE(VCPU_CFAR, offsetof(struct kvm_vcpu, arch.cfar));
510519
DEFINE(VCPU_PPR, offsetof(struct kvm_vcpu, arch.ppr));
520+
DEFINE(VCPU_FSCR, offsetof(struct kvm_vcpu, arch.fscr));
521+
DEFINE(VCPU_PSPB, offsetof(struct kvm_vcpu, arch.pspb));
522+
DEFINE(VCPU_TFHAR, offsetof(struct kvm_vcpu, arch.tfhar));
523+
DEFINE(VCPU_TFIAR, offsetof(struct kvm_vcpu, arch.tfiar));
524+
DEFINE(VCPU_TEXASR, offsetof(struct kvm_vcpu, arch.texasr));
525+
DEFINE(VCPU_EBBHR, offsetof(struct kvm_vcpu, arch.ebbhr));
526+
DEFINE(VCPU_EBBRR, offsetof(struct kvm_vcpu, arch.ebbrr));
527+
DEFINE(VCPU_BESCR, offsetof(struct kvm_vcpu, arch.bescr));
528+
DEFINE(VCPU_CSIGR, offsetof(struct kvm_vcpu, arch.csigr));
529+
DEFINE(VCPU_TACR, offsetof(struct kvm_vcpu, arch.tacr));
530+
DEFINE(VCPU_TCSCR, offsetof(struct kvm_vcpu, arch.tcscr));
531+
DEFINE(VCPU_ACOP, offsetof(struct kvm_vcpu, arch.acop));
532+
DEFINE(VCPU_WORT, offsetof(struct kvm_vcpu, arch.wort));
511533
DEFINE(VCPU_SHADOW_SRR1, offsetof(struct kvm_vcpu, arch.shadow_srr1));
512534
DEFINE(VCORE_ENTRY_EXIT, offsetof(struct kvmppc_vcore, entry_exit_count));
513535
DEFINE(VCORE_NAP_COUNT, offsetof(struct kvmppc_vcore, nap_count));
@@ -517,6 +539,7 @@ int main(void)
517539
DEFINE(VCORE_TB_OFFSET, offsetof(struct kvmppc_vcore, tb_offset));
518540
DEFINE(VCORE_LPCR, offsetof(struct kvmppc_vcore, lpcr));
519541
DEFINE(VCORE_PCR, offsetof(struct kvmppc_vcore, pcr));
542+
DEFINE(VCORE_DPDES, offsetof(struct kvmppc_vcore, dpdes));
520543
DEFINE(VCPU_SLB_E, offsetof(struct kvmppc_slb, orige));
521544
DEFINE(VCPU_SLB_V, offsetof(struct kvmppc_slb, origv));
522545
DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));

‎arch/powerpc/kvm/book3s_hv.c‎

Lines changed: 151 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -800,20 +800,93 @@ static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
800800
case KVM_REG_PPC_UAMOR:
801801
*val = get_reg_val(id, vcpu->arch.uamor);
802802
break;
803-
case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRA:
803+
case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS:
804804
i = id - KVM_REG_PPC_MMCR0;
805805
*val = get_reg_val(id, vcpu->arch.mmcr[i]);
806806
break;
807807
case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8:
808808
i = id - KVM_REG_PPC_PMC1;
809809
*val = get_reg_val(id, vcpu->arch.pmc[i]);
810810
break;
811+
case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2:
812+
i = id - KVM_REG_PPC_SPMC1;
813+
*val = get_reg_val(id, vcpu->arch.spmc[i]);
814+
break;
811815
case KVM_REG_PPC_SIAR:
812816
*val = get_reg_val(id, vcpu->arch.siar);
813817
break;
814818
case KVM_REG_PPC_SDAR:
815819
*val = get_reg_val(id, vcpu->arch.sdar);
816820
break;
821+
case KVM_REG_PPC_SIER:
822+
*val = get_reg_val(id, vcpu->arch.sier);
823+
break;
824+
case KVM_REG_PPC_IAMR:
825+
*val = get_reg_val(id, vcpu->arch.iamr);
826+
break;
827+
case KVM_REG_PPC_TFHAR:
828+
*val = get_reg_val(id, vcpu->arch.tfhar);
829+
break;
830+
case KVM_REG_PPC_TFIAR:
831+
*val = get_reg_val(id, vcpu->arch.tfiar);
832+
break;
833+
case KVM_REG_PPC_TEXASR:
834+
*val = get_reg_val(id, vcpu->arch.texasr);
835+
break;
836+
case KVM_REG_PPC_FSCR:
837+
*val = get_reg_val(id, vcpu->arch.fscr);
838+
break;
839+
case KVM_REG_PPC_PSPB:
840+
*val = get_reg_val(id, vcpu->arch.pspb);
841+
break;
842+
case KVM_REG_PPC_EBBHR:
843+
*val = get_reg_val(id, vcpu->arch.ebbhr);
844+
break;
845+
case KVM_REG_PPC_EBBRR:
846+
*val = get_reg_val(id, vcpu->arch.ebbrr);
847+
break;
848+
case KVM_REG_PPC_BESCR:
849+
*val = get_reg_val(id, vcpu->arch.bescr);
850+
break;
851+
case KVM_REG_PPC_TAR:
852+
*val = get_reg_val(id, vcpu->arch.tar);
853+
break;
854+
case KVM_REG_PPC_DPDES:
855+
*val = get_reg_val(id, vcpu->arch.vcore->dpdes);
856+
break;
857+
case KVM_REG_PPC_DAWR:
858+
*val = get_reg_val(id, vcpu->arch.dawr);
859+
break;
860+
case KVM_REG_PPC_DAWRX:
861+
*val = get_reg_val(id, vcpu->arch.dawrx);
862+
break;
863+
case KVM_REG_PPC_CIABR:
864+
*val = get_reg_val(id, vcpu->arch.ciabr);
865+
break;
866+
case KVM_REG_PPC_IC:
867+
*val = get_reg_val(id, vcpu->arch.ic);
868+
break;
869+
case KVM_REG_PPC_VTB:
870+
*val = get_reg_val(id, vcpu->arch.vtb);
871+
break;
872+
case KVM_REG_PPC_CSIGR:
873+
*val = get_reg_val(id, vcpu->arch.csigr);
874+
break;
875+
case KVM_REG_PPC_TACR:
876+
*val = get_reg_val(id, vcpu->arch.tacr);
877+
break;
878+
case KVM_REG_PPC_TCSCR:
879+
*val = get_reg_val(id, vcpu->arch.tcscr);
880+
break;
881+
case KVM_REG_PPC_PID:
882+
*val = get_reg_val(id, vcpu->arch.pid);
883+
break;
884+
case KVM_REG_PPC_ACOP:
885+
*val = get_reg_val(id, vcpu->arch.acop);
886+
break;
887+
case KVM_REG_PPC_WORT:
888+
*val = get_reg_val(id, vcpu->arch.wort);
889+
break;
817890
case KVM_REG_PPC_VPA_ADDR:
818891
spin_lock(&vcpu->arch.vpa_update_lock);
819892
*val = get_reg_val(id, vcpu->arch.vpa.next_gpa);
@@ -882,20 +955,96 @@ static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
882955
case KVM_REG_PPC_UAMOR:
883956
vcpu->arch.uamor = set_reg_val(id, *val);
884957
break;
885-
case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRA:
958+
case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS:
886959
i = id - KVM_REG_PPC_MMCR0;
887960
vcpu->arch.mmcr[i] = set_reg_val(id, *val);
888961
break;
889962
case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8:
890963
i = id - KVM_REG_PPC_PMC1;
891964
vcpu->arch.pmc[i] = set_reg_val(id, *val);
892965
break;
966+
case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2:
967+
i = id - KVM_REG_PPC_SPMC1;
968+
vcpu->arch.spmc[i] = set_reg_val(id, *val);
969+
break;
893970
case KVM_REG_PPC_SIAR:
894971
vcpu->arch.siar = set_reg_val(id, *val);
895972
break;
896973
case KVM_REG_PPC_SDAR:
897974
vcpu->arch.sdar = set_reg_val(id, *val);
898975
break;
976+
case KVM_REG_PPC_SIER:
977+
vcpu->arch.sier = set_reg_val(id, *val);
978+
break;
979+
case KVM_REG_PPC_IAMR:
980+
vcpu->arch.iamr = set_reg_val(id, *val);
981+
break;
982+
case KVM_REG_PPC_TFHAR:
983+
vcpu->arch.tfhar = set_reg_val(id, *val);
984+
break;
985+
case KVM_REG_PPC_TFIAR:
986+
vcpu->arch.tfiar = set_reg_val(id, *val);
987+
break;
988+
case KVM_REG_PPC_TEXASR:
989+
vcpu->arch.texasr = set_reg_val(id, *val);
990+
break;
991+
case KVM_REG_PPC_FSCR:
992+
vcpu->arch.fscr = set_reg_val(id, *val);
993+
break;
994+
case KVM_REG_PPC_PSPB:
995+
vcpu->arch.pspb = set_reg_val(id, *val);
996+
break;
997+
case KVM_REG_PPC_EBBHR:
998+
vcpu->arch.ebbhr = set_reg_val(id, *val);
999+
break;
1000+
case KVM_REG_PPC_EBBRR:
1001+
vcpu->arch.ebbrr = set_reg_val(id, *val);
1002+
break;
1003+
case KVM_REG_PPC_BESCR:
1004+
vcpu->arch.bescr = set_reg_val(id, *val);
1005+
break;
1006+
case KVM_REG_PPC_TAR:
1007+
vcpu->arch.tar = set_reg_val(id, *val);
1008+
break;
1009+
case KVM_REG_PPC_DPDES:
1010+
vcpu->arch.vcore->dpdes = set_reg_val(id, *val);
1011+
break;
1012+
case KVM_REG_PPC_DAWR:
1013+
vcpu->arch.dawr = set_reg_val(id, *val);
1014+
break;
1015+
case KVM_REG_PPC_DAWRX:
1016+
vcpu->arch.dawrx = set_reg_val(id, *val) & ~DAWRX_HYP;
1017+
break;
1018+
case KVM_REG_PPC_CIABR:
1019+
vcpu->arch.ciabr = set_reg_val(id, *val);
1020+
/* Don't allow setting breakpoints in hypervisor code */
1021+
if ((vcpu->arch.ciabr & CIABR_PRIV) == CIABR_PRIV_HYPER)
1022+
vcpu->arch.ciabr &= ~CIABR_PRIV; /* disable */
1023+
break;
1024+
case KVM_REG_PPC_IC:
1025+
vcpu->arch.ic = set_reg_val(id, *val);
1026+
break;
1027+
case KVM_REG_PPC_VTB:
1028+
vcpu->arch.vtb = set_reg_val(id, *val);
1029+
break;
1030+
case KVM_REG_PPC_CSIGR:
1031+
vcpu->arch.csigr = set_reg_val(id, *val);
1032+
break;
1033+
case KVM_REG_PPC_TACR:
1034+
vcpu->arch.tacr = set_reg_val(id, *val);
1035+
break;
1036+
case KVM_REG_PPC_TCSCR:
1037+
vcpu->arch.tcscr = set_reg_val(id, *val);
1038+
break;
1039+
case KVM_REG_PPC_PID:
1040+
vcpu->arch.pid = set_reg_val(id, *val);
1041+
break;
1042+
case KVM_REG_PPC_ACOP:
1043+
vcpu->arch.acop = set_reg_val(id, *val);
1044+
break;
1045+
case KVM_REG_PPC_WORT:
1046+
vcpu->arch.wort = set_reg_val(id, *val);
1047+
break;
8991048
case KVM_REG_PPC_VPA_ADDR:
9001049
addr = set_reg_val(id, *val);
9011050
r = -EINVAL;

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