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crypto: hisilicon/sec2 - fix for aead authsize alignment
The hardware only supports authentication sizes that are 4-byte aligned. Therefore, the driver switches to software computation in this case. Fixes: 2f072d7 ("crypto: hisilicon - Add aead support on SEC2") Signed-off-by: Wenkai Lin <[email protected]> Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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drivers/crypto/hisilicon/sec2/sec_crypto.c

Lines changed: 9 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,6 @@
5757
#define SEC_TYPE_MASK 0x0F
5858
#define SEC_DONE_MASK 0x0001
5959
#define SEC_ICV_MASK 0x000E
60-
#define SEC_SQE_LEN_RATE_MASK 0x3
6160

6261
#define SEC_TOTAL_IV_SZ(depth) (SEC_IV_SIZE * (depth))
6362
#define SEC_SGL_SGE_NR 128
@@ -80,16 +79,16 @@
8079
#define SEC_TOTAL_PBUF_SZ(depth) (PAGE_SIZE * SEC_PBUF_PAGE_NUM(depth) + \
8180
SEC_PBUF_LEFT_SZ(depth))
8281

83-
#define SEC_SQE_LEN_RATE 4
8482
#define SEC_SQE_CFLAG 2
8583
#define SEC_SQE_AEAD_FLAG 3
8684
#define SEC_SQE_DONE 0x1
8785
#define SEC_ICV_ERR 0x2
88-
#define MIN_MAC_LEN 4
8986
#define MAC_LEN_MASK 0x1U
9087
#define MAX_INPUT_DATA_LEN 0xFFFE00
9188
#define BITS_MASK 0xFF
89+
#define WORD_MASK 0x3
9290
#define BYTE_BITS 0x8
91+
#define BYTES_TO_WORDS(bcount) ((bcount) >> 2)
9392
#define SEC_XTS_NAME_SZ 0x3
9493
#define IV_CM_CAL_NUM 2
9594
#define IV_CL_MASK 0x7
@@ -1171,7 +1170,7 @@ static int sec_aead_setkey(struct crypto_aead *tfm, const u8 *key,
11711170
goto bad_key;
11721171
}
11731172

1174-
if (ctx->a_ctx.a_key_len & SEC_SQE_LEN_RATE_MASK) {
1173+
if (ctx->a_ctx.a_key_len & WORD_MASK) {
11751174
ret = -EINVAL;
11761175
dev_err(dev, "AUTH key length error!\n");
11771176
goto bad_key;
@@ -1579,11 +1578,10 @@ static void sec_auth_bd_fill_ex(struct sec_auth_ctx *ctx, int dir,
15791578

15801579
sec_sqe->type2.a_key_addr = cpu_to_le64(ctx->a_key_dma);
15811580

1582-
sec_sqe->type2.mac_key_alg = cpu_to_le32(authsize / SEC_SQE_LEN_RATE);
1581+
sec_sqe->type2.mac_key_alg = cpu_to_le32(BYTES_TO_WORDS(authsize));
15831582

15841583
sec_sqe->type2.mac_key_alg |=
1585-
cpu_to_le32((u32)((ctx->a_key_len) /
1586-
SEC_SQE_LEN_RATE) << SEC_AKEY_OFFSET);
1584+
cpu_to_le32((u32)BYTES_TO_WORDS(ctx->a_key_len) << SEC_AKEY_OFFSET);
15871585

15881586
sec_sqe->type2.mac_key_alg |=
15891587
cpu_to_le32((u32)(ctx->a_alg) << SEC_AEAD_ALG_OFFSET);
@@ -1635,12 +1633,10 @@ static void sec_auth_bd_fill_ex_v3(struct sec_auth_ctx *ctx, int dir,
16351633
sqe3->a_key_addr = cpu_to_le64(ctx->a_key_dma);
16361634

16371635
sqe3->auth_mac_key |=
1638-
cpu_to_le32((u32)(authsize /
1639-
SEC_SQE_LEN_RATE) << SEC_MAC_OFFSET_V3);
1636+
cpu_to_le32(BYTES_TO_WORDS(authsize) << SEC_MAC_OFFSET_V3);
16401637

16411638
sqe3->auth_mac_key |=
1642-
cpu_to_le32((u32)(ctx->a_key_len /
1643-
SEC_SQE_LEN_RATE) << SEC_AKEY_OFFSET_V3);
1639+
cpu_to_le32((u32)BYTES_TO_WORDS(ctx->a_key_len) << SEC_AKEY_OFFSET_V3);
16441640

16451641
sqe3->auth_mac_key |=
16461642
cpu_to_le32((u32)(ctx->a_alg) << SEC_AUTH_ALG_OFFSET_V3);
@@ -2230,8 +2226,8 @@ static int sec_aead_spec_check(struct sec_ctx *ctx, struct sec_req *sreq)
22302226
struct device *dev = ctx->dev;
22312227
int ret;
22322228

2233-
/* Hardware does not handle cases where authsize is less than 4 bytes */
2234-
if (unlikely(sz < MIN_MAC_LEN)) {
2229+
/* Hardware does not handle cases where authsize is not 4 bytes aligned */
2230+
if (c_mode == SEC_CMODE_CBC && (sz & WORD_MASK)) {
22352231
sreq->aead_req.fallback = true;
22362232
return -EINVAL;
22372233
}

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