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| 1 | +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) |
| 2 | +// |
| 3 | +// This file is provided under a dual BSD/GPLv2 license. When using or |
| 4 | +// redistributing this file, you may do so under either license. |
| 5 | +// |
| 6 | +// Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved. |
| 7 | +// |
| 8 | +// Authors: Vijendar Mukunda <[email protected]> |
| 9 | +// Ajit Kumar Pandey <[email protected]> |
| 10 | + |
| 11 | +/* |
| 12 | + * Hardware interface for generic AMD ACP processor |
| 13 | + */ |
| 14 | + |
| 15 | +#include <linux/io.h> |
| 16 | +#include <linux/module.h> |
| 17 | +#include <linux/pci.h> |
| 18 | + |
| 19 | +#include "../ops.h" |
| 20 | +#include "acp.h" |
| 21 | +#include "acp-dsp-offset.h" |
| 22 | + |
| 23 | +static int acp_power_on(struct snd_sof_dev *sdev) |
| 24 | +{ |
| 25 | + unsigned int val; |
| 26 | + int ret; |
| 27 | + |
| 28 | + val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_PGFSM_STATUS); |
| 29 | + |
| 30 | + if (val == ACP_POWERED_ON) |
| 31 | + return 0; |
| 32 | + |
| 33 | + if (val & ACP_PGFSM_STATUS_MASK) |
| 34 | + snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_PGFSM_CONTROL, |
| 35 | + ACP_PGFSM_CNTL_POWER_ON_MASK); |
| 36 | + |
| 37 | + ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_PGFSM_STATUS, val, !val, |
| 38 | + ACP_REG_POLL_INTERVAL, ACP_REG_POLL_TIMEOUT_US); |
| 39 | + if (ret < 0) |
| 40 | + dev_err(sdev->dev, "timeout in ACP_PGFSM_STATUS read\n"); |
| 41 | + |
| 42 | + return ret; |
| 43 | +} |
| 44 | + |
| 45 | +static int acp_reset(struct snd_sof_dev *sdev) |
| 46 | +{ |
| 47 | + unsigned int val; |
| 48 | + int ret; |
| 49 | + |
| 50 | + snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SOFT_RESET, ACP_ASSERT_RESET); |
| 51 | + |
| 52 | + ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_SOFT_RESET, val, |
| 53 | + val & ACP_SOFT_RESET_DONE_MASK, |
| 54 | + ACP_REG_POLL_INTERVAL, ACP_REG_POLL_TIMEOUT_US); |
| 55 | + if (ret < 0) { |
| 56 | + dev_err(sdev->dev, "timeout asserting reset\n"); |
| 57 | + return ret; |
| 58 | + } |
| 59 | + |
| 60 | + snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SOFT_RESET, ACP_RELEASE_RESET); |
| 61 | + |
| 62 | + ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_SOFT_RESET, val, !val, |
| 63 | + ACP_REG_POLL_INTERVAL, ACP_REG_POLL_TIMEOUT_US); |
| 64 | + if (ret < 0) |
| 65 | + dev_err(sdev->dev, "timeout in releasing reset\n"); |
| 66 | + |
| 67 | + return ret; |
| 68 | +} |
| 69 | + |
| 70 | +static int acp_init(struct snd_sof_dev *sdev) |
| 71 | +{ |
| 72 | + int ret; |
| 73 | + |
| 74 | + /* power on */ |
| 75 | + ret = acp_power_on(sdev); |
| 76 | + if (ret) { |
| 77 | + dev_err(sdev->dev, "ACP power on failed\n"); |
| 78 | + return ret; |
| 79 | + } |
| 80 | + /* Reset */ |
| 81 | + return acp_reset(sdev); |
| 82 | +} |
| 83 | + |
| 84 | +int amd_sof_acp_probe(struct snd_sof_dev *sdev) |
| 85 | +{ |
| 86 | + struct pci_dev *pci = to_pci_dev(sdev->dev); |
| 87 | + struct acp_dev_data *adata; |
| 88 | + unsigned int addr; |
| 89 | + |
| 90 | + adata = devm_kzalloc(sdev->dev, sizeof(struct acp_dev_data), |
| 91 | + GFP_KERNEL); |
| 92 | + if (!adata) |
| 93 | + return -ENOMEM; |
| 94 | + |
| 95 | + adata->dev = sdev; |
| 96 | + addr = pci_resource_start(pci, ACP_DSP_BAR); |
| 97 | + sdev->bar[ACP_DSP_BAR] = devm_ioremap(sdev->dev, addr, pci_resource_len(pci, ACP_DSP_BAR)); |
| 98 | + if (!sdev->bar[ACP_DSP_BAR]) { |
| 99 | + dev_err(sdev->dev, "ioremap error\n"); |
| 100 | + return -ENXIO; |
| 101 | + } |
| 102 | + |
| 103 | + pci_set_master(pci); |
| 104 | + |
| 105 | + sdev->pdata->hw_pdata = adata; |
| 106 | + |
| 107 | + return acp_init(sdev); |
| 108 | +} |
| 109 | +EXPORT_SYMBOL_NS(amd_sof_acp_probe, SND_SOC_SOF_AMD_COMMON); |
| 110 | + |
| 111 | +int amd_sof_acp_remove(struct snd_sof_dev *sdev) |
| 112 | +{ |
| 113 | + return acp_reset(sdev); |
| 114 | +} |
| 115 | +EXPORT_SYMBOL_NS(amd_sof_acp_remove, SND_SOC_SOF_AMD_COMMON); |
| 116 | + |
| 117 | +MODULE_DESCRIPTION("AMD ACP sof driver"); |
| 118 | +MODULE_LICENSE("Dual BSD/GPL"); |
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