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esmil
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riscv: dts: thead: Add TH1520 ethernet nodes
Add gmac, mdio, and phy nodes to enable the gigabit Ethernet ports on the BeagleV Ahead and Sipeed Lichee Pi 4a boards. Signed-off-by: Emil Renner Berthing <[email protected]> [drew: change apb registers from syscon to second reg of gmac node, add phy reset delay properties for beaglev ahead] Signed-off-by: Drew Fustini <[email protected]>
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‎arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts‎

Lines changed: 91 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@
1515
compatible = "beagle,beaglev-ahead", "thead,th1520";
1616

1717
aliases {
18+
ethernet0 = &gmac0;
1819
gpio0 = &gpio0;
1920
gpio1 = &gpio1;
2021
gpio2 = &gpio2;
@@ -98,6 +99,25 @@
9899
status = "okay";
99100
};
100101

102+
&gmac0 {
103+
pinctrl-names = "default";
104+
pinctrl-0 = <&gmac0_pins>;
105+
phy-handle = <&phy0>;
106+
phy-mode = "rgmii-id";
107+
status = "okay";
108+
};
109+
110+
&mdio0 {
111+
phy0: ethernet-phy@1 {
112+
reg = <1>;
113+
interrupt-parent = <&gpio3>;
114+
interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
115+
reset-gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;
116+
reset-delay-us = <10000>;
117+
reset-post-delay-us = <50000>;
118+
};
119+
};
120+
101121
&padctrl_aosys {
102122
led_pins: led-0 {
103123
led-pins {
@@ -116,6 +136,77 @@
116136
};
117137

118138
&padctrl0_apsys {
139+
gmac0_pins: gmac0-0 {
140+
tx-pins {
141+
pins = "GMAC0_TX_CLK",
142+
"GMAC0_TXEN",
143+
"GMAC0_TXD0",
144+
"GMAC0_TXD1",
145+
"GMAC0_TXD2",
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"GMAC0_TXD3";
147+
function = "gmac0";
148+
bias-disable;
149+
drive-strength = <25>;
150+
input-disable;
151+
input-schmitt-disable;
152+
slew-rate = <0>;
153+
};
154+
155+
rx-pins {
156+
pins = "GMAC0_RX_CLK",
157+
"GMAC0_RXDV",
158+
"GMAC0_RXD0",
159+
"GMAC0_RXD1",
160+
"GMAC0_RXD2",
161+
"GMAC0_RXD3";
162+
function = "gmac0";
163+
bias-disable;
164+
drive-strength = <1>;
165+
input-enable;
166+
input-schmitt-disable;
167+
slew-rate = <0>;
168+
};
169+
170+
mdc-pins {
171+
pins = "GMAC0_MDC";
172+
function = "gmac0";
173+
bias-disable;
174+
drive-strength = <13>;
175+
input-disable;
176+
input-schmitt-disable;
177+
slew-rate = <0>;
178+
};
179+
180+
mdio-pins {
181+
pins = "GMAC0_MDIO";
182+
function = "gmac0";
183+
bias-disable;
184+
drive-strength = <13>;
185+
input-enable;
186+
input-schmitt-enable;
187+
slew-rate = <0>;
188+
};
189+
190+
phy-reset-pins {
191+
pins = "GMAC0_COL"; /* GPIO3_21 */
192+
bias-disable;
193+
drive-strength = <3>;
194+
input-disable;
195+
input-schmitt-disable;
196+
slew-rate = <0>;
197+
};
198+
199+
phy-interrupt-pins {
200+
pins = "GMAC0_CRS"; /* GPIO3_22 */
201+
function = "gpio";
202+
bias-pull-up;
203+
drive-strength = <1>;
204+
input-enable;
205+
input-schmitt-enable;
206+
slew-rate = <0>;
207+
};
208+
};
209+
119210
uart0_pins: uart0-0 {
120211
tx-pins {
121212
pins = "UART0_TXD";

‎arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi‎

Lines changed: 119 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,11 @@
1111
model = "Sipeed Lichee Module 4A";
1212
compatible = "sipeed,lichee-module-4a", "thead,th1520";
1313

14+
aliases {
15+
ethernet0 = &gmac0;
16+
ethernet1 = &gmac1;
17+
};
18+
1419
memory@0 {
1520
device_type = "memory";
1621
reg = <0x0 0x00000000 0x2 0x00000000>;
@@ -45,6 +50,22 @@
4550
status = "okay";
4651
};
4752

53+
&gmac0 {
54+
pinctrl-names = "default";
55+
pinctrl-0 = <&gmac0_pins>, <&mdio0_pins>;
56+
phy-handle = <&phy0>;
57+
phy-mode = "rgmii-id";
58+
status = "okay";
59+
};
60+
61+
&gmac1 {
62+
pinctrl-names = "default";
63+
pinctrl-0 = <&gmac1_pins>;
64+
phy-handle = <&phy1>;
65+
phy-mode = "rgmii-id";
66+
status = "okay";
67+
};
68+
4869
&gpio0 {
4970
gpio-line-names = "", "", "", "", "", "", "", "", "", "",
5071
"", "", "", "", "", "", "", "", "", "",
@@ -78,6 +99,104 @@
7899
"GPIO10";
79100
};
80101

102+
&mdio0 {
103+
phy0: ethernet-phy@1 {
104+
reg = <1>;
105+
};
106+
107+
phy1: ethernet-phy@2 {
108+
reg = <2>;
109+
};
110+
};
111+
112+
&padctrl0_apsys {
113+
gmac0_pins: gmac0-0 {
114+
tx-pins {
115+
pins = "GMAC0_TX_CLK",
116+
"GMAC0_TXEN",
117+
"GMAC0_TXD0",
118+
"GMAC0_TXD1",
119+
"GMAC0_TXD2",
120+
"GMAC0_TXD3";
121+
function = "gmac0";
122+
bias-disable;
123+
drive-strength = <25>;
124+
input-disable;
125+
input-schmitt-disable;
126+
slew-rate = <0>;
127+
};
128+
129+
rx-pins {
130+
pins = "GMAC0_RX_CLK",
131+
"GMAC0_RXDV",
132+
"GMAC0_RXD0",
133+
"GMAC0_RXD1",
134+
"GMAC0_RXD2",
135+
"GMAC0_RXD3";
136+
function = "gmac0";
137+
bias-disable;
138+
drive-strength = <1>;
139+
input-enable;
140+
input-schmitt-disable;
141+
slew-rate = <0>;
142+
};
143+
};
144+
145+
gmac1_pins: gmac1-0 {
146+
tx-pins {
147+
pins = "GPIO2_18", /* GMAC1_TX_CLK */
148+
"GPIO2_20", /* GMAC1_TXEN */
149+
"GPIO2_21", /* GMAC1_TXD0 */
150+
"GPIO2_22", /* GMAC1_TXD1 */
151+
"GPIO2_23", /* GMAC1_TXD2 */
152+
"GPIO2_24"; /* GMAC1_TXD3 */
153+
function = "gmac1";
154+
bias-disable;
155+
drive-strength = <25>;
156+
input-disable;
157+
input-schmitt-disable;
158+
slew-rate = <0>;
159+
};
160+
161+
rx-pins {
162+
pins = "GPIO2_19", /* GMAC1_RX_CLK */
163+
"GPIO2_25", /* GMAC1_RXDV */
164+
"GPIO2_30", /* GMAC1_RXD0 */
165+
"GPIO2_31", /* GMAC1_RXD1 */
166+
"GPIO3_0", /* GMAC1_RXD2 */
167+
"GPIO3_1"; /* GMAC1_RXD3 */
168+
function = "gmac1";
169+
bias-disable;
170+
drive-strength = <1>;
171+
input-enable;
172+
input-schmitt-disable;
173+
slew-rate = <0>;
174+
};
175+
};
176+
177+
mdio0_pins: mdio0-0 {
178+
mdc-pins {
179+
pins = "GMAC0_MDC";
180+
function = "gmac0";
181+
bias-disable;
182+
drive-strength = <13>;
183+
input-disable;
184+
input-schmitt-disable;
185+
slew-rate = <0>;
186+
};
187+
188+
mdio-pins {
189+
pins = "GMAC0_MDIO";
190+
function = "gmac0";
191+
bias-disable;
192+
drive-strength = <13>;
193+
input-enable;
194+
input-schmitt-enable;
195+
slew-rate = <0>;
196+
};
197+
};
198+
};
199+
81200
&sdio0 {
82201
bus-width = <4>;
83202
max-frequency = <198000000>;

‎arch/riscv/boot/dts/thead/th1520.dtsi‎

Lines changed: 50 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -223,6 +223,12 @@
223223
#clock-cells = <0>;
224224
};
225225

226+
stmmac_axi_config: stmmac-axi-config {
227+
snps,wr_osr_lmt = <15>;
228+
snps,rd_osr_lmt = <15>;
229+
snps,blen = <0 0 64 32 0 0 0>;
230+
};
231+
226232
soc {
227233
compatible = "simple-bus";
228234
interrupt-parent = <&plic>;
@@ -274,6 +280,50 @@
274280
status = "disabled";
275281
};
276282

283+
gmac1: ethernet@ffe7060000 {
284+
compatible = "thead,th1520-gmac", "snps,dwmac-3.70a";
285+
reg = <0xff 0xe7060000 0x0 0x2000>, <0xff 0xec004000 0x0 0x1000>;
286+
reg-names = "dwmac", "apb";
287+
interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
288+
interrupt-names = "macirq";
289+
clocks = <&clk CLK_GMAC_AXI>, <&clk CLK_GMAC1>;
290+
clock-names = "stmmaceth", "pclk";
291+
snps,pbl = <32>;
292+
snps,fixed-burst;
293+
snps,multicast-filter-bins = <64>;
294+
snps,perfect-filter-entries = <32>;
295+
snps,axi-config = <&stmmac_axi_config>;
296+
status = "disabled";
297+
298+
mdio1: mdio {
299+
compatible = "snps,dwmac-mdio";
300+
#address-cells = <1>;
301+
#size-cells = <0>;
302+
};
303+
};
304+
305+
gmac0: ethernet@ffe7070000 {
306+
compatible = "thead,th1520-gmac", "snps,dwmac-3.70a";
307+
reg = <0xff 0xe7070000 0x0 0x2000>, <0xff 0xec003000 0x0 0x1000>;
308+
reg-names = "dwmac", "apb";
309+
interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
310+
interrupt-names = "macirq";
311+
clocks = <&clk CLK_GMAC_AXI>, <&clk CLK_GMAC0>;
312+
clock-names = "stmmaceth", "pclk";
313+
snps,pbl = <32>;
314+
snps,fixed-burst;
315+
snps,multicast-filter-bins = <64>;
316+
snps,perfect-filter-entries = <32>;
317+
snps,axi-config = <&stmmac_axi_config>;
318+
status = "disabled";
319+
320+
mdio0: mdio {
321+
compatible = "snps,dwmac-mdio";
322+
#address-cells = <1>;
323+
#size-cells = <0>;
324+
};
325+
};
326+
277327
emmc: mmc@ffe7080000 {
278328
compatible = "thead,th1520-dwcmshc";
279329
reg = <0xff 0xe7080000 0x0 0x10000>;

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