@@ -3019,115 +3019,6 @@ static struct platform_driver g_dsaf_driver = {
30193019
30203020module_platform_driver (g_dsaf_driver );
30213021
3022- /**
3023- * hns_dsaf_roce_reset - reset dsaf and roce
3024- * @dsaf_fwnode: Pointer to framework node for the dasf
3025- * @dereset: false - request reset , true - drop reset
3026- * return 0 - success , negative -fail
3027- */
3028- int hns_dsaf_roce_reset (struct fwnode_handle * dsaf_fwnode , bool dereset )
3029- {
3030- struct dsaf_device * dsaf_dev ;
3031- struct platform_device * pdev ;
3032- u32 mp ;
3033- u32 sl ;
3034- u32 credit ;
3035- int i ;
3036- static const u32 port_map [DSAF_ROCE_CREDIT_CHN ][DSAF_ROCE_CHAN_MODE_NUM ] = {
3037- {DSAF_ROCE_PORT_0 , DSAF_ROCE_PORT_0 , DSAF_ROCE_PORT_0 },
3038- {DSAF_ROCE_PORT_1 , DSAF_ROCE_PORT_0 , DSAF_ROCE_PORT_0 },
3039- {DSAF_ROCE_PORT_2 , DSAF_ROCE_PORT_1 , DSAF_ROCE_PORT_0 },
3040- {DSAF_ROCE_PORT_3 , DSAF_ROCE_PORT_1 , DSAF_ROCE_PORT_0 },
3041- {DSAF_ROCE_PORT_4 , DSAF_ROCE_PORT_2 , DSAF_ROCE_PORT_1 },
3042- {DSAF_ROCE_PORT_4 , DSAF_ROCE_PORT_2 , DSAF_ROCE_PORT_1 },
3043- {DSAF_ROCE_PORT_5 , DSAF_ROCE_PORT_3 , DSAF_ROCE_PORT_1 },
3044- {DSAF_ROCE_PORT_5 , DSAF_ROCE_PORT_3 , DSAF_ROCE_PORT_1 },
3045- };
3046- static const u32 sl_map [DSAF_ROCE_CREDIT_CHN ][DSAF_ROCE_CHAN_MODE_NUM ] = {
3047- {DSAF_ROCE_SL_0 , DSAF_ROCE_SL_0 , DSAF_ROCE_SL_0 },
3048- {DSAF_ROCE_SL_0 , DSAF_ROCE_SL_1 , DSAF_ROCE_SL_1 },
3049- {DSAF_ROCE_SL_0 , DSAF_ROCE_SL_0 , DSAF_ROCE_SL_2 },
3050- {DSAF_ROCE_SL_0 , DSAF_ROCE_SL_1 , DSAF_ROCE_SL_3 },
3051- {DSAF_ROCE_SL_0 , DSAF_ROCE_SL_0 , DSAF_ROCE_SL_0 },
3052- {DSAF_ROCE_SL_1 , DSAF_ROCE_SL_1 , DSAF_ROCE_SL_1 },
3053- {DSAF_ROCE_SL_0 , DSAF_ROCE_SL_0 , DSAF_ROCE_SL_2 },
3054- {DSAF_ROCE_SL_1 , DSAF_ROCE_SL_1 , DSAF_ROCE_SL_3 },
3055- };
3056-
3057- /* find the platform device corresponding to fwnode */
3058- if (is_of_node (dsaf_fwnode )) {
3059- pdev = of_find_device_by_node (to_of_node (dsaf_fwnode ));
3060- } else if (is_acpi_device_node (dsaf_fwnode )) {
3061- pdev = hns_dsaf_find_platform_device (dsaf_fwnode );
3062- } else {
3063- pr_err ("fwnode is neither OF or ACPI type\n" );
3064- return - EINVAL ;
3065- }
3066-
3067- /* check if we were a success in fetching pdev */
3068- if (!pdev ) {
3069- pr_err ("couldn't find platform device for node\n" );
3070- return - ENODEV ;
3071- }
3072-
3073- /* retrieve the dsaf_device from the driver data */
3074- dsaf_dev = dev_get_drvdata (& pdev -> dev );
3075- if (!dsaf_dev ) {
3076- dev_err (& pdev -> dev , "dsaf_dev is NULL\n" );
3077- put_device (& pdev -> dev );
3078- return - ENODEV ;
3079- }
3080-
3081- /* now, make sure we are running on compatible SoC */
3082- if (AE_IS_VER1 (dsaf_dev -> dsaf_ver )) {
3083- dev_err (dsaf_dev -> dev , "%s v1 chip doesn't support RoCE!\n" ,
3084- dsaf_dev -> ae_dev .name );
3085- put_device (& pdev -> dev );
3086- return - ENODEV ;
3087- }
3088-
3089- /* do reset or de-reset according to the flag */
3090- if (!dereset ) {
3091- /* reset rocee-channels in dsaf and rocee */
3092- dsaf_dev -> misc_op -> hns_dsaf_srst_chns (dsaf_dev , DSAF_CHNS_MASK ,
3093- false);
3094- dsaf_dev -> misc_op -> hns_dsaf_roce_srst (dsaf_dev , false);
3095- } else {
3096- /* configure dsaf tx roce correspond to port map and sl map */
3097- mp = dsaf_read_dev (dsaf_dev , DSAF_ROCE_PORT_MAP_REG );
3098- for (i = 0 ; i < DSAF_ROCE_CREDIT_CHN ; i ++ )
3099- dsaf_set_field (mp , 7 << i * 3 , i * 3 ,
3100- port_map [i ][DSAF_ROCE_6PORT_MODE ]);
3101- dsaf_set_field (mp , 3 << i * 3 , i * 3 , 0 );
3102- dsaf_write_dev (dsaf_dev , DSAF_ROCE_PORT_MAP_REG , mp );
3103-
3104- sl = dsaf_read_dev (dsaf_dev , DSAF_ROCE_SL_MAP_REG );
3105- for (i = 0 ; i < DSAF_ROCE_CREDIT_CHN ; i ++ )
3106- dsaf_set_field (sl , 3 << i * 2 , i * 2 ,
3107- sl_map [i ][DSAF_ROCE_6PORT_MODE ]);
3108- dsaf_write_dev (dsaf_dev , DSAF_ROCE_SL_MAP_REG , sl );
3109-
3110- /* de-reset rocee-channels in dsaf and rocee */
3111- dsaf_dev -> misc_op -> hns_dsaf_srst_chns (dsaf_dev , DSAF_CHNS_MASK ,
3112- true);
3113- msleep (SRST_TIME_INTERVAL );
3114- dsaf_dev -> misc_op -> hns_dsaf_roce_srst (dsaf_dev , true);
3115-
3116- /* enable dsaf channel rocee credit */
3117- credit = dsaf_read_dev (dsaf_dev , DSAF_SBM_ROCEE_CFG_REG_REG );
3118- dsaf_set_bit (credit , DSAF_SBM_ROCEE_CFG_CRD_EN_B , 0 );
3119- dsaf_write_dev (dsaf_dev , DSAF_SBM_ROCEE_CFG_REG_REG , credit );
3120-
3121- dsaf_set_bit (credit , DSAF_SBM_ROCEE_CFG_CRD_EN_B , 1 );
3122- dsaf_write_dev (dsaf_dev , DSAF_SBM_ROCEE_CFG_REG_REG , credit );
3123- }
3124-
3125- put_device (& pdev -> dev );
3126-
3127- return 0 ;
3128- }
3129- EXPORT_SYMBOL (hns_dsaf_roce_reset );
3130-
31313022MODULE_LICENSE ("GPL" );
31323023MODULE_AUTHOR ("Huawei Tech. Co., Ltd." );
31333024MODULE_DESCRIPTION ("HNS DSAF driver" );
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