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dt-bindings: dmaengine: Introduce RZN1 dmamux bindings
The Renesas RZN1 DMA IP is based on a DW core, with eg. an additional dmamux register located in the system control area which can take up to 32 requests (16 per DMA controller). Each DMA channel can be wired to two different peripherals. Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Rob Herring <[email protected]> Acked-by: Vinod Koul <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dma/renesas,rzn1-dmamux.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas RZ/N1 DMA mux
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maintainers:
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- Miquel Raynal <[email protected]>
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allOf:
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- $ref: "dma-router.yaml#"
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properties:
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compatible:
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const: renesas,rzn1-dmamux
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reg:
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maxItems: 1
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description: DMA mux first register offset within the system control parent.
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'#dma-cells':
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const: 6
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description:
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The first four cells are dedicated to the master DMA controller. The fifth
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cell gives the DMA mux bit index that must be set starting from 0. The
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sixth cell gives the binary value that must be written there, ie. 0 or 1.
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dma-masters:
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minItems: 1
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maxItems: 2
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dma-requests:
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const: 32
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required:
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- reg
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- dma-requests
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additionalProperties: false
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examples:
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- |
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dma-router@a0 {
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compatible = "renesas,rzn1-dmamux";
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reg = <0xa0 4>;
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#dma-cells = <6>;
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dma-masters = <&dma0 &dma1>;
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dma-requests = <32>;
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};

MAINTAINERS

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M: Viresh Kumar <[email protected]>
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R: Andy Shevchenko <[email protected]>
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S: Maintained
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F: Documentation/devicetree/bindings/dma/renesas,rzn1-dmamux.yaml
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F: Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml
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F: drivers/dma/dw/
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F: include/dt-bindings/dma/dw-dmac.h

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