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ice: Introduce ice_get_phy_model() wrapper
Introduce ice_get_phy_model() to improve code readability Signed-off-by: Sergey Temerkhanov <[email protected]> Reviewed-by: Przemek Kitszel <[email protected]> Reviewed-by: Simon Horman <[email protected]> Tested-by: Pucha Himasekhar Reddy <[email protected]> (A Contingent worker at Intel) Signed-off-by: Tony Nguyen <[email protected]>
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+25
-21
lines changed

3 files changed

+25
-21
lines changed

‎drivers/net/ethernet/intel/ice/ice.h‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1047,5 +1047,10 @@ static inline void ice_clear_rdma_cap(struct ice_pf *pf)
10471047
clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);
10481048
}
10491049

1050+
static inline enum ice_phy_model ice_get_phy_model(const struct ice_hw *hw)
1051+
{
1052+
return hw->ptp.phy_model;
1053+
}
1054+
10501055
extern const struct xdp_metadata_ops ice_xdp_md_ops;
10511056
#endif /* _ICE_H_ */

‎drivers/net/ethernet/intel/ice/ice_ptp.c‎

Lines changed: 9 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1285,7 +1285,7 @@ ice_ptp_port_phy_stop(struct ice_ptp_port *ptp_port)
12851285

12861286
mutex_lock(&ptp_port->ps_lock);
12871287

1288-
switch (hw->ptp.phy_model) {
1288+
switch (ice_get_phy_model(hw)) {
12891289
case ICE_PHY_ETH56G:
12901290
err = ice_stop_phy_timer_eth56g(hw, port, true);
12911291
break;
@@ -1331,7 +1331,7 @@ ice_ptp_port_phy_restart(struct ice_ptp_port *ptp_port)
13311331

13321332
mutex_lock(&ptp_port->ps_lock);
13331333

1334-
switch (hw->ptp.phy_model) {
1334+
switch (ice_get_phy_model(hw)) {
13351335
case ICE_PHY_ETH56G:
13361336
err = ice_start_phy_timer_eth56g(hw, port);
13371337
break;
@@ -1402,8 +1402,7 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup)
14021402
/* Skip HW writes if reset is in progress */
14031403
if (pf->hw.reset_ongoing)
14041404
return;
1405-
1406-
switch (hw->ptp.phy_model) {
1405+
switch (ice_get_phy_model(hw)) {
14071406
case ICE_PHY_E810:
14081407
/* Do not reconfigure E810 PHY */
14091408
return;
@@ -1436,7 +1435,7 @@ static int ice_ptp_cfg_phy_interrupt(struct ice_pf *pf, bool ena, u32 threshold)
14361435

14371436
ice_ptp_reset_ts_memory(hw);
14381437

1439-
switch (hw->ptp.phy_model) {
1438+
switch (ice_get_phy_model(hw)) {
14401439
case ICE_PHY_ETH56G: {
14411440
int port;
14421441

@@ -1475,7 +1474,7 @@ static int ice_ptp_cfg_phy_interrupt(struct ice_pf *pf, bool ena, u32 threshold)
14751474
case ICE_PHY_UNSUP:
14761475
default:
14771476
dev_warn(dev, "%s: Unexpected PHY model %d\n", __func__,
1478-
hw->ptp.phy_model);
1477+
ice_get_phy_model(hw));
14791478
return -EOPNOTSUPP;
14801479
}
14811480
}
@@ -2037,7 +2036,7 @@ ice_ptp_settime64(struct ptp_clock_info *info, const struct timespec64 *ts)
20372036
/* For Vernier mode on E82X, we need to recalibrate after new settime.
20382037
* Start with marking timestamps as invalid.
20392038
*/
2040-
if (hw->ptp.phy_model == ICE_PHY_E82X) {
2039+
if (ice_get_phy_model(hw) == ICE_PHY_E82X) {
20412040
err = ice_ptp_clear_phy_offset_ready_e82x(hw);
20422041
if (err)
20432042
dev_warn(ice_pf_to_dev(pf), "Failed to mark timestamps as invalid before settime\n");
@@ -2061,7 +2060,7 @@ ice_ptp_settime64(struct ptp_clock_info *info, const struct timespec64 *ts)
20612060
ice_ptp_enable_all_perout(pf);
20622061

20632062
/* Recalibrate and re-enable timestamp blocks for E822/E823 */
2064-
if (hw->ptp.phy_model == ICE_PHY_E82X)
2063+
if (ice_get_phy_model(hw) == ICE_PHY_E82X)
20652064
ice_ptp_restart_all_phy(pf);
20662065
exit:
20672066
if (err) {
@@ -3242,7 +3241,7 @@ static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port)
32423241

32433242
mutex_init(&ptp_port->ps_lock);
32443243

3245-
switch (hw->ptp.phy_model) {
3244+
switch (ice_get_phy_model(hw)) {
32463245
case ICE_PHY_ETH56G:
32473246
return ice_ptp_init_tx_eth56g(pf, &ptp_port->tx,
32483247
ptp_port->port_num);
@@ -3340,7 +3339,7 @@ static void ice_ptp_remove_auxbus_device(struct ice_pf *pf)
33403339
*/
33413340
static void ice_ptp_init_tx_interrupt_mode(struct ice_pf *pf)
33423341
{
3343-
switch (pf->hw.ptp.phy_model) {
3342+
switch (ice_get_phy_model(&pf->hw)) {
33443343
case ICE_PHY_E82X:
33453344
/* E822 based PHY has the clock owner process the interrupt
33463345
* for all ports.

‎drivers/net/ethernet/intel/ice/ice_ptp_hw.c‎

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -829,7 +829,7 @@ static u32 ice_ptp_tmr_cmd_to_port_reg(struct ice_hw *hw,
829829
/* Certain hardware families share the same register values for the
830830
* port register and source timer register.
831831
*/
832-
switch (hw->ptp.phy_model) {
832+
switch (ice_get_phy_model(hw)) {
833833
case ICE_PHY_E810:
834834
return ice_ptp_tmr_cmd_to_src_reg(hw, cmd) & TS_CMD_MASK_E810;
835835
default:
@@ -5502,7 +5502,7 @@ void ice_ptp_init_hw(struct ice_hw *hw)
55025502
static int ice_ptp_write_port_cmd(struct ice_hw *hw, u8 port,
55035503
enum ice_ptp_tmr_cmd cmd)
55045504
{
5505-
switch (hw->ptp.phy_model) {
5505+
switch (ice_get_phy_model(hw)) {
55065506
case ICE_PHY_ETH56G:
55075507
return ice_ptp_write_port_cmd_eth56g(hw, port, cmd);
55085508
case ICE_PHY_E82X:
@@ -5567,7 +5567,7 @@ static int ice_ptp_port_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd)
55675567
u32 port;
55685568

55695569
/* PHY models which can program all ports simultaneously */
5570-
switch (hw->ptp.phy_model) {
5570+
switch (ice_get_phy_model(hw)) {
55715571
case ICE_PHY_E810:
55725572
return ice_ptp_port_cmd_e810(hw, cmd);
55735573
default:
@@ -5646,7 +5646,7 @@ int ice_ptp_init_time(struct ice_hw *hw, u64 time)
56465646

56475647
/* PHY timers */
56485648
/* Fill Rx and Tx ports and send msg to PHY */
5649-
switch (hw->ptp.phy_model) {
5649+
switch (ice_get_phy_model(hw)) {
56505650
case ICE_PHY_ETH56G:
56515651
err = ice_ptp_prep_phy_time_eth56g(hw,
56525652
(u32)(time & 0xFFFFFFFF));
@@ -5692,7 +5692,7 @@ int ice_ptp_write_incval(struct ice_hw *hw, u64 incval)
56925692
wr32(hw, GLTSYN_SHADJ_L(tmr_idx), lower_32_bits(incval));
56935693
wr32(hw, GLTSYN_SHADJ_H(tmr_idx), upper_32_bits(incval));
56945694

5695-
switch (hw->ptp.phy_model) {
5695+
switch (ice_get_phy_model(hw)) {
56965696
case ICE_PHY_ETH56G:
56975697
err = ice_ptp_prep_phy_incval_eth56g(hw, incval);
56985698
break;
@@ -5761,7 +5761,7 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj)
57615761
wr32(hw, GLTSYN_SHADJ_L(tmr_idx), 0);
57625762
wr32(hw, GLTSYN_SHADJ_H(tmr_idx), adj);
57635763

5764-
switch (hw->ptp.phy_model) {
5764+
switch (ice_get_phy_model(hw)) {
57655765
case ICE_PHY_ETH56G:
57665766
err = ice_ptp_prep_phy_adj_eth56g(hw, adj);
57675767
break;
@@ -5794,7 +5794,7 @@ int ice_ptp_adj_clock(struct ice_hw *hw, s32 adj)
57945794
*/
57955795
int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp)
57965796
{
5797-
switch (hw->ptp.phy_model) {
5797+
switch (ice_get_phy_model(hw)) {
57985798
case ICE_PHY_ETH56G:
57995799
return ice_read_ptp_tstamp_eth56g(hw, block, idx, tstamp);
58005800
case ICE_PHY_E810:
@@ -5824,7 +5824,7 @@ int ice_read_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx, u64 *tstamp)
58245824
*/
58255825
int ice_clear_phy_tstamp(struct ice_hw *hw, u8 block, u8 idx)
58265826
{
5827-
switch (hw->ptp.phy_model) {
5827+
switch (ice_get_phy_model(hw)) {
58285828
case ICE_PHY_ETH56G:
58295829
return ice_clear_ptp_tstamp_eth56g(hw, block, idx);
58305830
case ICE_PHY_E810:
@@ -5887,7 +5887,7 @@ static int ice_get_pf_c827_idx(struct ice_hw *hw, u8 *idx)
58875887
*/
58885888
void ice_ptp_reset_ts_memory(struct ice_hw *hw)
58895889
{
5890-
switch (hw->ptp.phy_model) {
5890+
switch (ice_get_phy_model(hw)) {
58915891
case ICE_PHY_ETH56G:
58925892
ice_ptp_reset_ts_memory_eth56g(hw);
58935893
break;
@@ -5916,7 +5916,7 @@ int ice_ptp_init_phc(struct ice_hw *hw)
59165916
/* Clear event err indications for auxiliary pins */
59175917
(void)rd32(hw, GLTSYN_STAT(src_idx));
59185918

5919-
switch (hw->ptp.phy_model) {
5919+
switch (ice_get_phy_model(hw)) {
59205920
case ICE_PHY_ETH56G:
59215921
return ice_ptp_init_phc_eth56g(hw);
59225922
case ICE_PHY_E810:
@@ -5941,7 +5941,7 @@ int ice_ptp_init_phc(struct ice_hw *hw)
59415941
*/
59425942
int ice_get_phy_tx_tstamp_ready(struct ice_hw *hw, u8 block, u64 *tstamp_ready)
59435943
{
5944-
switch (hw->ptp.phy_model) {
5944+
switch (ice_get_phy_model(hw)) {
59455945
case ICE_PHY_ETH56G:
59465946
return ice_get_phy_tx_tstamp_ready_eth56g(hw, block,
59475947
tstamp_ready);

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