Skip to content

Commit 5242b0c

Browse files
davem330davem330
committed
Merge branch '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/t
nguy/next-queue Tony Nguyen says: ==================== 1GbE Intel Wired LAN Driver Updates 2021-07-16 Vinicius Costa Gomes says: Add support for steering traffic to specific RX queues using Flex Filters. As the name implies, Flex Filters are more flexible than using Layer-2, VLAN or MAC address filters, one of the reasons is that they allow "AND" operations more easily, e.g. when the user wants to steer some traffic based on the source MAC address and the packet ethertype. Future work include adding support for offloading tc-u32 filters to the hardware. The series is divided as follows: Patch 1/5, add the low level primitives for configuring Flex filters. Patch 2/5 and 3/5, allow ethtool to manage Flex filters. Patch 4/5, when specifying filters that have multiple predicates, use Flex filters. Patch 5/5, Adds support for exposing the i225 LEDs using the LED subsystem. ==================== Signed-off-by: David S. Miller <[email protected]>
2 parents 08041a9 + cf83318 commit 5242b0c

File tree

6 files changed

+595
-24
lines changed

6 files changed

+595
-24
lines changed

‎drivers/net/ethernet/intel/Kconfig‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -335,6 +335,7 @@ config IGC
335335
tristate "Intel(R) Ethernet Controller I225-LM/I225-V support"
336336
default n
337337
depends on PCI
338+
depends on LEDS_CLASS
338339
help
339340
This driver supports Intel(R) Ethernet Controller I225-LM/I225-V
340341
family of adapters.

‎drivers/net/ethernet/intel/igc/igc.h‎

Lines changed: 41 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@
1313
#include <linux/ptp_clock_kernel.h>
1414
#include <linux/timecounter.h>
1515
#include <linux/net_tstamp.h>
16+
#include <linux/leds.h>
1617

1718
#include "igc_hw.h"
1819

@@ -33,6 +34,8 @@ void igc_ethtool_set_ops(struct net_device *);
3334
#define IGC_N_PEROUT 2
3435
#define IGC_N_SDP 4
3536

37+
#define MAX_FLEX_FILTER 32
38+
3639
enum igc_mac_filter_type {
3740
IGC_MAC_FILTER_TYPE_DST = 0,
3841
IGC_MAC_FILTER_TYPE_SRC
@@ -237,8 +240,17 @@ struct igc_adapter {
237240
struct timespec64 start;
238241
struct timespec64 period;
239242
} perout[IGC_N_PEROUT];
243+
244+
/* LEDs */
245+
struct mutex led_mutex;
246+
struct led_classdev led0;
247+
struct led_classdev led1;
248+
struct led_classdev led2;
240249
};
241250

251+
#define led_to_igc(ldev, led) \
252+
container_of(ldev, struct igc_adapter, led)
253+
242254
void igc_up(struct igc_adapter *adapter);
243255
void igc_down(struct igc_adapter *adapter);
244256
int igc_open(struct net_device *netdev);
@@ -476,31 +488,53 @@ struct igc_q_vector {
476488
};
477489

478490
enum igc_filter_match_flags {
479-
IGC_FILTER_FLAG_ETHER_TYPE = 0x1,
480-
IGC_FILTER_FLAG_VLAN_TCI = 0x2,
481-
IGC_FILTER_FLAG_SRC_MAC_ADDR = 0x4,
482-
IGC_FILTER_FLAG_DST_MAC_ADDR = 0x8,
491+
IGC_FILTER_FLAG_ETHER_TYPE = BIT(0),
492+
IGC_FILTER_FLAG_VLAN_TCI = BIT(1),
493+
IGC_FILTER_FLAG_SRC_MAC_ADDR = BIT(2),
494+
IGC_FILTER_FLAG_DST_MAC_ADDR = BIT(3),
495+
IGC_FILTER_FLAG_USER_DATA = BIT(4),
496+
IGC_FILTER_FLAG_VLAN_ETYPE = BIT(5),
483497
};
484498

485499
struct igc_nfc_filter {
486500
u8 match_flags;
487501
u16 etype;
502+
__be16 vlan_etype;
488503
u16 vlan_tci;
489504
u8 src_addr[ETH_ALEN];
490505
u8 dst_addr[ETH_ALEN];
506+
u8 user_data[8];
507+
u8 user_mask[8];
508+
u8 flex_index;
509+
u8 rx_queue;
510+
u8 prio;
511+
u8 immediate_irq;
512+
u8 drop;
491513
};
492514

493515
struct igc_nfc_rule {
494516
struct list_head list;
495517
struct igc_nfc_filter filter;
496518
u32 location;
497519
u16 action;
520+
bool flex;
498521
};
499522

500-
/* IGC supports a total of 32 NFC rules: 16 MAC address based,, 8 VLAN priority
501-
* based, and 8 ethertype based.
523+
/* IGC supports a total of 32 NFC rules: 16 MAC address based, 8 VLAN priority
524+
* based, 8 ethertype based and 32 Flex filter based rules.
502525
*/
503-
#define IGC_MAX_RXNFC_RULES 32
526+
#define IGC_MAX_RXNFC_RULES 64
527+
528+
struct igc_flex_filter {
529+
u8 index;
530+
u8 data[128];
531+
u8 mask[16];
532+
u8 length;
533+
u8 rx_queue;
534+
u8 prio;
535+
u8 immediate_irq;
536+
u8 drop;
537+
};
504538

505539
/* igc_desc_unused - calculate if we have unused descriptors */
506540
static inline u16 igc_desc_unused(const struct igc_ring *ring)

‎drivers/net/ethernet/intel/igc/igc_defines.h‎

Lines changed: 57 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -17,11 +17,22 @@
1717
#define IGC_WUC_PME_EN 0x00000002 /* PME Enable */
1818

1919
/* Wake Up Filter Control */
20-
#define IGC_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */
21-
#define IGC_WUFC_MAG 0x00000002 /* Magic Packet Wakeup Enable */
22-
#define IGC_WUFC_EX 0x00000004 /* Directed Exact Wakeup Enable */
23-
#define IGC_WUFC_MC 0x00000008 /* Directed Multicast Wakeup Enable */
24-
#define IGC_WUFC_BC 0x00000010 /* Broadcast Wakeup Enable */
20+
#define IGC_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */
21+
#define IGC_WUFC_MAG 0x00000002 /* Magic Packet Wakeup Enable */
22+
#define IGC_WUFC_EX 0x00000004 /* Directed Exact Wakeup Enable */
23+
#define IGC_WUFC_MC 0x00000008 /* Directed Multicast Wakeup Enable */
24+
#define IGC_WUFC_BC 0x00000010 /* Broadcast Wakeup Enable */
25+
#define IGC_WUFC_FLEX_HQ BIT(14) /* Flex Filters Host Queuing */
26+
#define IGC_WUFC_FLX0 BIT(16) /* Flexible Filter 0 Enable */
27+
#define IGC_WUFC_FLX1 BIT(17) /* Flexible Filter 1 Enable */
28+
#define IGC_WUFC_FLX2 BIT(18) /* Flexible Filter 2 Enable */
29+
#define IGC_WUFC_FLX3 BIT(19) /* Flexible Filter 3 Enable */
30+
#define IGC_WUFC_FLX4 BIT(20) /* Flexible Filter 4 Enable */
31+
#define IGC_WUFC_FLX5 BIT(21) /* Flexible Filter 5 Enable */
32+
#define IGC_WUFC_FLX6 BIT(22) /* Flexible Filter 6 Enable */
33+
#define IGC_WUFC_FLX7 BIT(23) /* Flexible Filter 7 Enable */
34+
35+
#define IGC_WUFC_FILTER_MASK GENMASK(23, 14)
2536

2637
#define IGC_CTRL_ADVD3WUC 0x00100000 /* D3 WUC */
2738

@@ -46,6 +57,37 @@
4657
/* Wake Up Packet Memory stores the first 128 bytes of the wake up packet */
4758
#define IGC_WUPM_BYTES 128
4859

60+
/* Wakeup Filter Control Extended */
61+
#define IGC_WUFC_EXT_FLX8 BIT(8) /* Flexible Filter 8 Enable */
62+
#define IGC_WUFC_EXT_FLX9 BIT(9) /* Flexible Filter 9 Enable */
63+
#define IGC_WUFC_EXT_FLX10 BIT(10) /* Flexible Filter 10 Enable */
64+
#define IGC_WUFC_EXT_FLX11 BIT(11) /* Flexible Filter 11 Enable */
65+
#define IGC_WUFC_EXT_FLX12 BIT(12) /* Flexible Filter 12 Enable */
66+
#define IGC_WUFC_EXT_FLX13 BIT(13) /* Flexible Filter 13 Enable */
67+
#define IGC_WUFC_EXT_FLX14 BIT(14) /* Flexible Filter 14 Enable */
68+
#define IGC_WUFC_EXT_FLX15 BIT(15) /* Flexible Filter 15 Enable */
69+
#define IGC_WUFC_EXT_FLX16 BIT(16) /* Flexible Filter 16 Enable */
70+
#define IGC_WUFC_EXT_FLX17 BIT(17) /* Flexible Filter 17 Enable */
71+
#define IGC_WUFC_EXT_FLX18 BIT(18) /* Flexible Filter 18 Enable */
72+
#define IGC_WUFC_EXT_FLX19 BIT(19) /* Flexible Filter 19 Enable */
73+
#define IGC_WUFC_EXT_FLX20 BIT(20) /* Flexible Filter 20 Enable */
74+
#define IGC_WUFC_EXT_FLX21 BIT(21) /* Flexible Filter 21 Enable */
75+
#define IGC_WUFC_EXT_FLX22 BIT(22) /* Flexible Filter 22 Enable */
76+
#define IGC_WUFC_EXT_FLX23 BIT(23) /* Flexible Filter 23 Enable */
77+
#define IGC_WUFC_EXT_FLX24 BIT(24) /* Flexible Filter 24 Enable */
78+
#define IGC_WUFC_EXT_FLX25 BIT(25) /* Flexible Filter 25 Enable */
79+
#define IGC_WUFC_EXT_FLX26 BIT(26) /* Flexible Filter 26 Enable */
80+
#define IGC_WUFC_EXT_FLX27 BIT(27) /* Flexible Filter 27 Enable */
81+
#define IGC_WUFC_EXT_FLX28 BIT(28) /* Flexible Filter 28 Enable */
82+
#define IGC_WUFC_EXT_FLX29 BIT(29) /* Flexible Filter 29 Enable */
83+
#define IGC_WUFC_EXT_FLX30 BIT(30) /* Flexible Filter 30 Enable */
84+
#define IGC_WUFC_EXT_FLX31 BIT(31) /* Flexible Filter 31 Enable */
85+
86+
#define IGC_WUFC_EXT_FILTER_MASK GENMASK(31, 8)
87+
88+
/* Physical Func Reset Done Indication */
89+
#define IGC_CTRL_EXT_LINK_MODE_MASK 0x00C00000
90+
4991
/* Loop limit on how long we wait for auto-negotiation to complete */
5092
#define COPPER_LINK_UP_LIMIT 10
5193
#define PHY_AUTO_NEG_LIMIT 45
@@ -102,6 +144,16 @@
102144
#define IGC_CTRL_SDP0_DIR 0x00400000 /* SDP0 Data direction */
103145
#define IGC_CTRL_SDP1_DIR 0x00800000 /* SDP1 Data direction */
104146

147+
/* LED Control */
148+
#define IGC_LEDCTL_LED0_MODE_SHIFT 0
149+
#define IGC_LEDCTL_LED0_MODE_MASK GENMASK(3, 0)
150+
#define IGC_LEDCTL_LED1_MODE_SHIFT 8
151+
#define IGC_LEDCTL_LED1_MODE_MASK GENMASK(11, 8)
152+
#define IGC_LEDCTL_LED2_MODE_SHIFT 16
153+
#define IGC_LEDCTL_LED2_MODE_MASK GENMASK(19, 16)
154+
155+
#define IGC_CONNSW_AUTOSENSE_EN 0x1
156+
105157
/* As per the EAS the maximum supported size is 9.5KB (9728 bytes) */
106158
#define MAX_JUMBO_FRAME_SIZE 0x2600
107159

‎drivers/net/ethernet/intel/igc/igc_ethtool.c‎

Lines changed: 30 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -979,6 +979,12 @@ static int igc_ethtool_get_nfc_rule(struct igc_adapter *adapter,
979979
eth_broadcast_addr(fsp->m_u.ether_spec.h_source);
980980
}
981981

982+
if (rule->filter.match_flags & IGC_FILTER_FLAG_USER_DATA) {
983+
fsp->flow_type |= FLOW_EXT;
984+
memcpy(fsp->h_ext.data, rule->filter.user_data, sizeof(fsp->h_ext.data));
985+
memcpy(fsp->m_ext.data, rule->filter.user_mask, sizeof(fsp->m_ext.data));
986+
}
987+
982988
mutex_unlock(&adapter->nfc_rule_lock);
983989
return 0;
984990

@@ -1215,6 +1221,30 @@ static void igc_ethtool_init_nfc_rule(struct igc_nfc_rule *rule,
12151221
ether_addr_copy(rule->filter.dst_addr,
12161222
fsp->h_u.ether_spec.h_dest);
12171223
}
1224+
1225+
/* VLAN etype matching */
1226+
if ((fsp->flow_type & FLOW_EXT) && fsp->h_ext.vlan_etype) {
1227+
rule->filter.vlan_etype = fsp->h_ext.vlan_etype;
1228+
rule->filter.match_flags |= IGC_FILTER_FLAG_VLAN_ETYPE;
1229+
}
1230+
1231+
/* Check for user defined data */
1232+
if ((fsp->flow_type & FLOW_EXT) &&
1233+
(fsp->h_ext.data[0] || fsp->h_ext.data[1])) {
1234+
rule->filter.match_flags |= IGC_FILTER_FLAG_USER_DATA;
1235+
memcpy(rule->filter.user_data, fsp->h_ext.data, sizeof(fsp->h_ext.data));
1236+
memcpy(rule->filter.user_mask, fsp->m_ext.data, sizeof(fsp->m_ext.data));
1237+
}
1238+
1239+
/* When multiple filter options or user data or vlan etype is set, use a
1240+
* flex filter.
1241+
*/
1242+
if ((rule->filter.match_flags & IGC_FILTER_FLAG_USER_DATA) ||
1243+
(rule->filter.match_flags & IGC_FILTER_FLAG_VLAN_ETYPE) ||
1244+
(rule->filter.match_flags & (rule->filter.match_flags - 1)))
1245+
rule->flex = true;
1246+
else
1247+
rule->flex = false;
12181248
}
12191249

12201250
/**
@@ -1244,11 +1274,6 @@ static int igc_ethtool_check_nfc_rule(struct igc_adapter *adapter,
12441274
return -EINVAL;
12451275
}
12461276

1247-
if (flags & (flags - 1)) {
1248-
netdev_dbg(dev, "Rule with multiple matches not supported\n");
1249-
return -EOPNOTSUPP;
1250-
}
1251-
12521277
list_for_each_entry(tmp, &adapter->nfc_rule_list, list) {
12531278
if (!memcmp(&rule->filter, &tmp->filter,
12541279
sizeof(rule->filter)) &&
@@ -1280,12 +1305,6 @@ static int igc_ethtool_add_nfc_rule(struct igc_adapter *adapter,
12801305
return -EOPNOTSUPP;
12811306
}
12821307

1283-
if ((fsp->flow_type & FLOW_EXT) &&
1284-
fsp->m_ext.vlan_tci != htons(VLAN_PRIO_MASK)) {
1285-
netdev_dbg(netdev, "VLAN mask not supported\n");
1286-
return -EOPNOTSUPP;
1287-
}
1288-
12891308
if (fsp->ring_cookie >= adapter->num_rx_queues) {
12901309
netdev_dbg(netdev, "Invalid action\n");
12911310
return -EINVAL;

0 commit comments

Comments
 (0)