Skip to content

Commit 4bf24ad

Browse files
Hans J. Schultzkuba-moo
authored andcommitted
net: dsa: mv88e6xxx: read FID when handling ATU violations
When an ATU violation occurs, the switch uses the ATU FID register to report the FID of the MAC address that incurred the violation. It would be good for the driver to know the FID value for purposes such as logging and CPU-based authentication. Up until now, the driver has been calling the mv88e6xxx_g1_atu_op() function to read ATU violations, but that doesn't do exactly what we want, namely it calls mv88e6xxx_g1_atu_fid_write() with FID 0. (side note, the documentation for the ATU Get/Clear Violation command says that writes to the ATU FID register have no effect before the operation starts, it's only that we disregard the value that this register provides once the operation completes) So mv88e6xxx_g1_atu_fid_write() is not what we want, but rather mv88e6xxx_g1_atu_fid_read(). However, the latter doesn't exist, we need to write it. The remainder of mv88e6xxx_g1_atu_op() except for mv88e6xxx_g1_atu_fid_write() is still needed, namely to send a GET_CLR_VIOLATION command to the ATU. In principle we could have still kept calling mv88e6xxx_g1_atu_op(), but the MDIO writes to the ATU FID register are pointless, but in the interest of doing less CPU work per interrupt, write a new function called mv88e6xxx_g1_read_atu_violation() and call it. The FID will be the port default FID as set by mv88e6xxx_port_set_fid() if the VID from the packet cannot be found in the VTU. Otherwise it is the FID derived from the VTU entry associated with that VID. Signed-off-by: Hans J. Schultz <[email protected]> Signed-off-by: Vladimir Oltean <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: Jakub Kicinski <[email protected]>
1 parent 8a1786b commit 4bf24ad

File tree

1 file changed

+61
-11
lines changed

1 file changed

+61
-11
lines changed

drivers/net/dsa/mv88e6xxx/global1_atu.c

Lines changed: 61 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -114,6 +114,19 @@ static int mv88e6xxx_g1_atu_op_wait(struct mv88e6xxx_chip *chip)
114114
return mv88e6xxx_g1_wait_bit(chip, MV88E6XXX_G1_ATU_OP, bit, 0);
115115
}
116116

117+
static int mv88e6xxx_g1_read_atu_violation(struct mv88e6xxx_chip *chip)
118+
{
119+
int err;
120+
121+
err = mv88e6xxx_g1_write(chip, MV88E6XXX_G1_ATU_OP,
122+
MV88E6XXX_G1_ATU_OP_BUSY |
123+
MV88E6XXX_G1_ATU_OP_GET_CLR_VIOLATION);
124+
if (err)
125+
return err;
126+
127+
return mv88e6xxx_g1_atu_op_wait(chip);
128+
}
129+
117130
static int mv88e6xxx_g1_atu_op(struct mv88e6xxx_chip *chip, u16 fid, u16 op)
118131
{
119132
u16 val;
@@ -159,6 +172,41 @@ int mv88e6xxx_g1_atu_get_next(struct mv88e6xxx_chip *chip, u16 fid)
159172
return mv88e6xxx_g1_atu_op(chip, fid, MV88E6XXX_G1_ATU_OP_GET_NEXT_DB);
160173
}
161174

175+
static int mv88e6xxx_g1_atu_fid_read(struct mv88e6xxx_chip *chip, u16 *fid)
176+
{
177+
u16 val = 0, upper = 0, op = 0;
178+
int err = -EOPNOTSUPP;
179+
180+
if (mv88e6xxx_num_databases(chip) > 256) {
181+
err = mv88e6xxx_g1_read(chip, MV88E6352_G1_ATU_FID, &val);
182+
val &= 0xfff;
183+
if (err)
184+
return err;
185+
} else {
186+
err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_OP, &op);
187+
if (err)
188+
return err;
189+
if (mv88e6xxx_num_databases(chip) > 64) {
190+
/* ATU DBNum[7:4] are located in ATU Control 15:12 */
191+
err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_CTL,
192+
&upper);
193+
if (err)
194+
return err;
195+
196+
upper = (upper >> 8) & 0x00f0;
197+
} else if (mv88e6xxx_num_databases(chip) > 16) {
198+
/* ATU DBNum[5:4] are located in ATU Operation 9:8 */
199+
upper = (op >> 4) & 0x30;
200+
}
201+
202+
/* ATU DBNum[3:0] are located in ATU Operation 3:0 */
203+
val = (op & 0xf) | upper;
204+
}
205+
*fid = val;
206+
207+
return err;
208+
}
209+
162210
/* Offset 0x0C: ATU Data Register */
163211

164212
static int mv88e6xxx_g1_atu_data_read(struct mv88e6xxx_chip *chip,
@@ -353,21 +401,23 @@ static irqreturn_t mv88e6xxx_g1_atu_prob_irq_thread_fn(int irq, void *dev_id)
353401
{
354402
struct mv88e6xxx_chip *chip = dev_id;
355403
struct mv88e6xxx_atu_entry entry;
356-
int spid;
357-
int err;
358-
u16 val;
404+
int err, spid;
405+
u16 val, fid;
359406

360407
mv88e6xxx_reg_lock(chip);
361408

362-
err = mv88e6xxx_g1_atu_op(chip, 0,
363-
MV88E6XXX_G1_ATU_OP_GET_CLR_VIOLATION);
409+
err = mv88e6xxx_g1_read_atu_violation(chip);
364410
if (err)
365411
goto out;
366412

367413
err = mv88e6xxx_g1_read(chip, MV88E6XXX_G1_ATU_OP, &val);
368414
if (err)
369415
goto out;
370416

417+
err = mv88e6xxx_g1_atu_fid_read(chip, &fid);
418+
if (err)
419+
goto out;
420+
371421
err = mv88e6xxx_g1_atu_data_read(chip, &entry);
372422
if (err)
373423
goto out;
@@ -380,22 +430,22 @@ static irqreturn_t mv88e6xxx_g1_atu_prob_irq_thread_fn(int irq, void *dev_id)
380430

381431
if (val & MV88E6XXX_G1_ATU_OP_MEMBER_VIOLATION) {
382432
dev_err_ratelimited(chip->dev,
383-
"ATU member violation for %pM portvec %x spid %d\n",
384-
entry.mac, entry.portvec, spid);
433+
"ATU member violation for %pM fid %u portvec %x spid %d\n",
434+
entry.mac, fid, entry.portvec, spid);
385435
chip->ports[spid].atu_member_violation++;
386436
}
387437

388438
if (val & MV88E6XXX_G1_ATU_OP_MISS_VIOLATION) {
389439
dev_err_ratelimited(chip->dev,
390-
"ATU miss violation for %pM portvec %x spid %d\n",
391-
entry.mac, entry.portvec, spid);
440+
"ATU miss violation for %pM fid %u portvec %x spid %d\n",
441+
entry.mac, fid, entry.portvec, spid);
392442
chip->ports[spid].atu_miss_violation++;
393443
}
394444

395445
if (val & MV88E6XXX_G1_ATU_OP_FULL_VIOLATION) {
396446
dev_err_ratelimited(chip->dev,
397-
"ATU full violation for %pM portvec %x spid %d\n",
398-
entry.mac, entry.portvec, spid);
447+
"ATU full violation for %pM fid %u portvec %x spid %d\n",
448+
entry.mac, fid, entry.portvec, spid);
399449
chip->ports[spid].atu_full_violation++;
400450
}
401451
mv88e6xxx_reg_unlock(chip);

0 commit comments

Comments
 (0)