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torvaldstorvalds
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Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fixes from Ralf Baechle: "Pretty much all across the field so with this we should be in reasonable shape for the upcoming -rc2" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: OCTEON: make get_system_type() thread-safe MIPS: CPS: Initialize EVA before bringing up VPEs from secondary cores MIPS: Malta: EVA: Rename 'eva_entry' to 'platform_eva_init' MIPS: EVA: Add new EVA header MIPS: scall64-o32: Fix indirect syscall detection MIPS: syscall: Fix AUDIT value for O32 processes on MIPS64 MIPS: Loongson: Fix COP2 usage for preemptible kernel MIPS: NL: Fix nlm_xlp_defconfig build error MIPS: Remove race window in page fault handling MIPS: Malta: Improve system memory detection for '{e, }memsize' >= 2G MIPS: Alchemy: Fix db1200 PSC clock enablement MIPS: BCM47XX: Fix reboot problem on BCM4705/BCM4785 MIPS: Remove duplicated include from numa.c MIPS: Add common plat_irq_dispatch declaration MIPS: MSP71xx: remove unused plat_irq_dispatch() argument MIPS: GIC: Remove useless parens from GICBIS(). MIPS: perf: Mark pmu interupt IRQF_NO_THREAD
2 parents 01e9982 + 6083086 commit 497c01d

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18 files changed

+142
-59
lines changed

18 files changed

+142
-59
lines changed

‎arch/mips/alchemy/devboards/db1200.c‎

Lines changed: 1 addition & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -847,6 +847,7 @@ int __init db1200_dev_setup(void)
847847
pr_warn("DB1200: cant get I2C close to 50MHz\n");
848848
else
849849
clk_set_rate(c, pfc);
850+
clk_prepare_enable(c);
850851
clk_put(c);
851852
}
852853

@@ -922,11 +923,6 @@ int __init db1200_dev_setup(void)
922923
}
923924

924925
/* Audio PSC clock is supplied externally. (FIXME: platdata!!) */
925-
c = clk_get(NULL, "psc1_intclk");
926-
if (!IS_ERR(c)) {
927-
clk_prepare_enable(c);
928-
clk_put(c);
929-
}
930926
__raw_writel(PSC_SEL_CLK_SERCLK,
931927
(void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
932928
wmb();

‎arch/mips/bcm47xx/setup.c‎

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -59,12 +59,21 @@ static void bcm47xx_machine_restart(char *command)
5959
switch (bcm47xx_bus_type) {
6060
#ifdef CONFIG_BCM47XX_SSB
6161
case BCM47XX_BUS_TYPE_SSB:
62-
ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 3);
62+
if (bcm47xx_bus.ssb.chip_id == 0x4785)
63+
write_c0_diag4(1 << 22);
64+
ssb_watchdog_timer_set(&bcm47xx_bus.ssb, 1);
65+
if (bcm47xx_bus.ssb.chip_id == 0x4785) {
66+
__asm__ __volatile__(
67+
".set\tmips3\n\t"
68+
"sync\n\t"
69+
"wait\n\t"
70+
".set\tmips0");
71+
}
6372
break;
6473
#endif
6574
#ifdef CONFIG_BCM47XX_BCMA
6675
case BCM47XX_BUS_TYPE_BCMA:
67-
bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 3);
76+
bcma_chipco_watchdog_timer_set(&bcm47xx_bus.bcma.bus.drv_cc, 1);
6877
break;
6978
#endif
7079
}

‎arch/mips/cavium-octeon/setup.c‎

Lines changed: 13 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -263,7 +263,6 @@ static uint64_t crashk_size, crashk_base;
263263
static int octeon_uart;
264264

265265
extern asmlinkage void handle_int(void);
266-
extern asmlinkage void plat_irq_dispatch(void);
267266

268267
/**
269268
* Return non zero if we are currently running in the Octeon simulator
@@ -458,18 +457,26 @@ static void octeon_halt(void)
458457
octeon_kill_core(NULL);
459458
}
460459

460+
static char __read_mostly octeon_system_type[80];
461+
462+
static int __init init_octeon_system_type(void)
463+
{
464+
snprintf(octeon_system_type, sizeof(octeon_system_type), "%s (%s)",
465+
cvmx_board_type_to_string(octeon_bootinfo->board_type),
466+
octeon_model_get_string(read_c0_prid()));
467+
468+
return 0;
469+
}
470+
early_initcall(init_octeon_system_type);
471+
461472
/**
462473
* Return a string representing the system type
463474
*
464475
* Returns
465476
*/
466477
const char *octeon_board_type_string(void)
467478
{
468-
static char name[80];
469-
sprintf(name, "%s (%s)",
470-
cvmx_board_type_to_string(octeon_bootinfo->board_type),
471-
octeon_model_get_string(read_c0_prid()));
472-
return name;
479+
return octeon_system_type;
473480
}
474481

475482
const char *get_system_type(void)

‎arch/mips/include/asm/eva.h‎

Lines changed: 43 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,43 @@
1+
/*
2+
* This file is subject to the terms and conditions of the GNU General Public
3+
* License. See the file "COPYING" in the main directory of this archive
4+
* for more details.
5+
*
6+
* Copyright (C) 2014, Imagination Technologies Ltd.
7+
*
8+
* EVA functions for generic code
9+
*/
10+
11+
#ifndef _ASM_EVA_H
12+
#define _ASM_EVA_H
13+
14+
#include <kernel-entry-init.h>
15+
16+
#ifdef __ASSEMBLY__
17+
18+
#ifdef CONFIG_EVA
19+
20+
/*
21+
* EVA early init code
22+
*
23+
* Platforms must define their own 'platform_eva_init' macro in
24+
* their kernel-entry-init.h header. This macro usually does the
25+
* platform specific configuration of the segmentation registers,
26+
* and it is normally called from assembly code.
27+
*
28+
*/
29+
30+
.macro eva_init
31+
platform_eva_init
32+
.endm
33+
34+
#else
35+
36+
.macro eva_init
37+
.endm
38+
39+
#endif /* CONFIG_EVA */
40+
41+
#endif /* __ASSEMBLY__ */
42+
43+
#endif

‎arch/mips/include/asm/gic.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@
4949
#endif
5050
#define GICBIS(reg, mask, bits) \
5151
do { u32 data; \
52-
GICREAD((reg), data); \
52+
GICREAD(reg, data); \
5353
data &= ~(mask); \
5454
data |= ((bits) & (mask)); \
5555
GICWRITE((reg), data); \

‎arch/mips/include/asm/irq.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,8 @@ static inline int irq_canonicalize(int irq)
2626
#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
2727
#endif
2828

29+
asmlinkage void plat_irq_dispatch(void);
30+
2931
extern void do_IRQ(unsigned int irq);
3032

3133
extern void arch_init_irq(void);

‎arch/mips/include/asm/mach-malta/kernel-entry-init.h‎

Lines changed: 16 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -10,14 +10,15 @@
1010
#ifndef __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H
1111
#define __ASM_MACH_MIPS_KERNEL_ENTRY_INIT_H
1212

13+
#include <asm/regdef.h>
14+
#include <asm/mipsregs.h>
15+
1316
/*
1417
* Prepare segments for EVA boot:
1518
*
1619
* This is in case the processor boots in legacy configuration
1720
* (SI_EVAReset is de-asserted and CONFIG5.K == 0)
1821
*
19-
* On entry, t1 is loaded with CP0_CONFIG
20-
*
2122
* ========================= Mappings =============================
2223
* Virtual memory Physical memory Mapping
2324
* 0x00000000 - 0x7fffffff 0x80000000 - 0xfffffffff MUSUK (kuseg)
@@ -30,12 +31,20 @@
3031
*
3132
*
3233
* Lowmem is expanded to 2GB
34+
*
35+
* The following code uses the t0, t1, t2 and ra registers without
36+
* previously preserving them.
37+
*
3338
*/
34-
.macro eva_entry
39+
.macro platform_eva_init
40+
41+
.set push
42+
.set reorder
3543
/*
3644
* Get Config.K0 value and use it to program
3745
* the segmentation registers
3846
*/
47+
mfc0 t1, CP0_CONFIG
3948
andi t1, 0x7 /* CCA */
4049
move t2, t1
4150
ins t2, t1, 16, 3
@@ -77,6 +86,8 @@
7786
mtc0 t0, $16, 5
7887
sync
7988
jal mips_ihb
89+
90+
.set pop
8091
.endm
8192

8293
.macro kernel_entry_setup
@@ -95,7 +106,7 @@
95106
sll t0, t0, 6 /* SC bit */
96107
bgez t0, 9f
97108

98-
eva_entry
109+
platform_eva_init
99110
b 0f
100111
9:
101112
/* Assume we came from YAMON... */
@@ -127,8 +138,7 @@
127138
#ifdef CONFIG_EVA
128139
sync
129140
ehb
130-
mfc0 t1, CP0_CONFIG
131-
eva_entry
141+
platform_eva_init
132142
#endif
133143
.endm
134144

‎arch/mips/include/asm/mach-netlogic/topology.h‎

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -10,13 +10,6 @@
1010

1111
#include <asm/mach-netlogic/multi-node.h>
1212

13-
#ifdef CONFIG_SMP
14-
#define topology_physical_package_id(cpu) cpu_to_node(cpu)
15-
#define topology_core_id(cpu) (cpu_logical_map(cpu) / NLM_THREADS_PER_CORE)
16-
#define topology_thread_cpumask(cpu) (&cpu_sibling_map[cpu])
17-
#define topology_core_cpumask(cpu) cpumask_of_node(cpu_to_node(cpu))
18-
#endif
19-
2013
#include <asm-generic/topology.h>
2114

2215
#endif /* _ASM_MACH_NETLOGIC_TOPOLOGY_H */

‎arch/mips/include/asm/pgtable.h‎

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -122,6 +122,9 @@ do { \
122122
} \
123123
} while(0)
124124

125+
extern void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
126+
pte_t pteval);
127+
125128
#if defined(CONFIG_64BIT_PHYS_ADDR) && defined(CONFIG_CPU_MIPS32)
126129

127130
#define pte_none(pte) (!(((pte).pte_low | (pte).pte_high) & ~_PAGE_GLOBAL))
@@ -145,7 +148,6 @@ static inline void set_pte(pte_t *ptep, pte_t pte)
145148
}
146149
}
147150
}
148-
#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
149151

150152
static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
151153
{
@@ -183,7 +185,6 @@ static inline void set_pte(pte_t *ptep, pte_t pteval)
183185
}
184186
#endif
185187
}
186-
#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
187188

188189
static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
189190
{
@@ -390,15 +391,12 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
390391

391392
extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
392393
pte_t pte);
393-
extern void __update_cache(struct vm_area_struct *vma, unsigned long address,
394-
pte_t pte);
395394

396395
static inline void update_mmu_cache(struct vm_area_struct *vma,
397396
unsigned long address, pte_t *ptep)
398397
{
399398
pte_t pte = *ptep;
400399
__update_tlb(vma, address, pte);
401-
__update_cache(vma, address, pte);
402400
}
403401

404402
static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,

‎arch/mips/include/asm/syscall.h‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -131,10 +131,12 @@ static inline int syscall_get_arch(void)
131131
{
132132
int arch = EM_MIPS;
133133
#ifdef CONFIG_64BIT
134-
if (!test_thread_flag(TIF_32BIT_REGS))
134+
if (!test_thread_flag(TIF_32BIT_REGS)) {
135135
arch |= __AUDIT_ARCH_64BIT;
136-
if (test_thread_flag(TIF_32BIT_ADDR))
137-
arch |= __AUDIT_ARCH_CONVENTION_MIPS64_N32;
136+
/* N32 sets only TIF_32BIT_ADDR */
137+
if (test_thread_flag(TIF_32BIT_ADDR))
138+
arch |= __AUDIT_ARCH_CONVENTION_MIPS64_N32;
139+
}
138140
#endif
139141
#if defined(__LITTLE_ENDIAN)
140142
arch |= __AUDIT_ARCH_LE;

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