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2 parents 96ff072 + 3357674 commit 3cc590bCopy full SHA for 3cc590b
arch/x86/kernel/apic/apic.c
@@ -440,7 +440,19 @@ static int lapic_timer_shutdown(struct clock_event_device *evt)
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v = apic_read(APIC_LVTT);
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v |= (APIC_LVT_MASKED | LOCAL_TIMER_VECTOR);
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apic_write(APIC_LVTT, v);
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- apic_write(APIC_TMICT, 0);
+
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+ /*
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+ * Setting APIC_LVT_MASKED (above) should be enough to tell
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+ * the hardware that this timer will never fire. But AMD
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+ * erratum 411 and some Intel CPU behavior circa 2024 say
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+ * otherwise. Time for belt and suspenders programming: mask
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+ * the timer _and_ zero the counter registers:
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+ */
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+ if (v & APIC_LVT_TIMER_TSCDEADLINE)
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+ wrmsrl(MSR_IA32_TSC_DEADLINE, 0);
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+ else
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+ apic_write(APIC_TMICT, 0);
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return 0;
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}
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