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.mailmap

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@@ -68,6 +68,8 @@ Jacob Shin <[email protected]>
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James Bottomley <jejb@mulgrave.(none)>
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James Bottomley <[email protected]>
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James E Wilson <[email protected]>
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James Ketrenos <jketreno@io.(none)>
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Documentation/ABI/testing/sysfs-bus-thunderbolt

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@@ -110,3 +110,51 @@ Description: When new NVM image is written to the non-active NVM
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is directly the status value from the DMA configuration
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based mailbox before the device is power cycled. Writing
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0 here clears the status.
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What: /sys/bus/thunderbolt/devices/<xdomain>.<service>/key
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Date: Jan 2018
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KernelVersion: 4.15
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Description: This contains name of the property directory the XDomain
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service exposes. This entry describes the protocol in
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question. Following directories are already reserved by
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the Apple XDomain specification:
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network: IP/ethernet over Thunderbolt
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targetdm: Target disk mode protocol over Thunderbolt
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extdisp: External display mode protocol over Thunderbolt
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What: /sys/bus/thunderbolt/devices/<xdomain>.<service>/modalias
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Date: Jan 2018
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KernelVersion: 4.15
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Description: Stores the same MODALIAS value emitted by uevent for
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the XDomain service. Format: tbtsvc:kSpNvNrN
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What: /sys/bus/thunderbolt/devices/<xdomain>.<service>/prtcid
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Date: Jan 2018
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KernelVersion: 4.15
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Description: This contains XDomain protocol identifier the XDomain
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service supports.
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What: /sys/bus/thunderbolt/devices/<xdomain>.<service>/prtcvers
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Date: Jan 2018
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KernelVersion: 4.15
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Description: This contains XDomain protocol version the XDomain
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service supports.
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What: /sys/bus/thunderbolt/devices/<xdomain>.<service>/prtcrevs
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Date: Jan 2018
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KernelVersion: 4.15
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Description: This contains XDomain software version the XDomain
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service supports.
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What: /sys/bus/thunderbolt/devices/<xdomain>.<service>/prtcstns
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Date: Jan 2018
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KernelVersion: 4.15
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Description: This contains XDomain service specific settings as
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bitmask. Format: %x

Documentation/ABI/testing/sysfs-power

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@@ -127,7 +127,7 @@ Description:
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What; /sys/power/pm_trace_dev_match
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Date: October 2010
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Contact: James Hogan <[email protected]>
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Contact: James Hogan <[email protected]>
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Description:
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The /sys/power/pm_trace_dev_match file contains the name of the
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device associated with the last PM event point saved in the RTC

Documentation/admin-guide/thunderbolt.rst

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@@ -197,3 +197,27 @@ information is missing.
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To recover from this mode, one needs to flash a valid NVM image to the
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host host controller in the same way it is done in the previous chapter.
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Networking over Thunderbolt cable
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---------------------------------
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Thunderbolt technology allows software communication across two hosts
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connected by a Thunderbolt cable.
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It is possible to tunnel any kind of traffic over Thunderbolt link but
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currently we only support Apple ThunderboltIP protocol.
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If the other host is running Windows or macOS only thing you need to
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do is to connect Thunderbolt cable between the two hosts, the
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``thunderbolt-net`` is loaded automatically. If the other host is also
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Linux you should load ``thunderbolt-net`` manually on one host (it does
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not matter which one)::
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# modprobe thunderbolt-net
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This triggers module load on the other host automatically. If the driver
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is built-in to the kernel image, there is no need to do anything.
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The driver will create one virtual ethernet interface per Thunderbolt
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port which are named like ``thunderbolt0`` and so on. From this point
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you can either use standard userspace tools like ``ifconfig`` to
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configure the interface or let your GUI to handle it automatically.

Documentation/core-api/workqueue.rst

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Although MT wq wasted a lot of resource, the level of concurrency
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provided was unsatisfactory. The limitation was common to both ST and
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MT wq albeit less severe on MT. Each wq maintained its own separate
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worker pool. A MT wq could provide only one execution context per CPU
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while a ST wq one for the whole system. Work items had to compete for
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worker pool. An MT wq could provide only one execution context per CPU
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while an ST wq one for the whole system. Work items had to compete for
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those very limited execution contexts leading to various problems
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including proneness to deadlocks around the single execution context.
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``alloc_workqueue()`` allocates a wq. The original
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``create_*workqueue()`` functions are deprecated and scheduled for
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removal. ``alloc_workqueue()`` takes three arguments - @``name``,
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removal. ``alloc_workqueue()`` takes three arguments - ``@name``,
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``@flags`` and ``@max_active``. ``@name`` is the name of the wq and
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also used as the name of the rescuer thread if there is one.
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served by worker threads with elevated nice level.
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Note that normal and highpri worker-pools don't interact with
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each other. Each maintain its separate pool of workers and
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each other. Each maintains its separate pool of workers and
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implements concurrency management among its workers.
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``WQ_CPU_INTENSIVE``
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time thus achieving the same ordering property as ST wq.
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In the current implementation the above configuration only guarantees
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ST behavior within a given NUMA node. Instead alloc_ordered_queue should
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be used to achieve system wide ST behavior.
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ST behavior within a given NUMA node. Instead ``alloc_ordered_queue()`` should
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be used to achieve system-wide ST behavior.
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Example Execution Scenarios

Documentation/cpu-freq/index.txt

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@@ -32,8 +32,6 @@ cpufreq-stats.txt - General description of sysfs cpufreq stats.
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index.txt - File index, Mailing list and Links (this document)
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intel-pstate.txt - Intel pstate cpufreq driver specific file.
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pcc-cpufreq.txt - PCC cpufreq driver specific file.
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Documentation/device-mapper/dm-raid.txt

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(wrong raid10_copies/raid10_format sequence)
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1.11.1 Add raid4/5/6 journal write-back support via journal_mode option
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1.12.1 fix for MD deadlock between mddev_suspend() and md_write_start() available
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1.13.0 Fix dev_health status at end of "recover" (was 'a', now 'A')

Documentation/devicetree/bindings/clock/st,stm32h7-rcc.txt

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compatible = "st,stm32h743-rcc", "st,stm32-rcc";
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reg = <0x58024400 0x400>;
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#reset-cells = <1>;
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#clock-cells = <2>;
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#clock-cells = <1>;
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clocks = <&clk_hse>, <&clk_lse>, <&clk_i2s_ckin>;
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st,syscfg = <&pwrcfg>;

Documentation/devicetree/bindings/leds/ams,as3645a.txt

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compatible : Must be "ams,as3645a".
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reg : The I2C address of the device. Typically 0x30.
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#address-cells : 1
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#size-cells : 0
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Required properties of the "flash" child node
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=============================================
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Required properties of the flash child node (0)
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===============================================
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reg: 0
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flash-timeout-us: Flash timeout in microseconds. The value must be in
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the range [100000, 850000] and divisible by 50000.
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flash-max-microamp: Maximum flash current in microamperes. Has to be
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and divisible by 50000.
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Optional properties of the "flash" child node
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=============================================
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Optional properties of the flash child node
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===========================================
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label : The label of the flash LED.
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Required properties of the "indicator" child node
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=================================================
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Required properties of the indicator child node (1)
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===================================================
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reg: 1
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led-max-microamp: Maximum indicator current. The allowed values are
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2500, 5000, 7500 and 10000.
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Optional properties of the "indicator" child node
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=================================================
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Optional properties of the indicator child node
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===============================================
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label : The label of the indicator LED.
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=======
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as3645a@30 {
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#address-cells: 1
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#size-cells: 0
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reg = <0x30>;
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compatible = "ams,as3645a";
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flash {
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flash@0 {
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reg = <0x0>;
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flash-timeout-us = <150000>;
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flash-max-microamp = <320000>;
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led-max-microamp = <60000>;
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ams,input-max-microamp = <1750000>;
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label = "as3645a:flash";
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};
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indicator {
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indicator@1 {
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reg = <0x1>;
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led-max-microamp = <10000>;
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label = "as3645a:indicator";
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};

Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.txt

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- clocks:
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Array of clocks required for SDHC.
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Require at least input clock for Xenon IP core.
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Require at least input clock for Xenon IP core. For Armada AP806 and
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CP110, the AXI clock is also mandatory.
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- clock-names:
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Array of names corresponding to clocks property.
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The input clock for Xenon IP core should be named as "core".
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The input clock for the AXI bus must be named as "axi".
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- reg:
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* For "marvell,armada-3700-sdhci", two register areas.
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compatible = "marvell,armada-ap806-sdhci";
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reg = <0xaa0000 0x1000>;
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interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>
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clocks = <&emmc_clk>;
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clock-names = "core";
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clocks = <&emmc_clk>,<&axi_clk>;
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clock-names = "core", "axi";
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bus-width = <4>;
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marvell,xenon-phy-slow-mode;
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marvell,xenon-tun-count = <11>;
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interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>
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vqmmc-supply = <&sd_vqmmc_regulator>;
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vmmc-supply = <&sd_vmmc_regulator>;
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clocks = <&sdclk>;
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clock-names = "core";
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clocks = <&sdclk>, <&axi_clk>;
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clock-names = "core", "axi";
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bus-width = <4>;
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marvell,xenon-tun-count = <9>;
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};

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