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Michael Chandavem330
Michael Chan
authored and
davem330
committed
bnxt_en: Update firmware interface to 1.10.2.63
The main changes are firmware live patch support and 2 additional FEC standard counters. Add the matching FEC counters to ethtool counter array. Firmware older than 220 does not return the proper size of the extended RX counters so we need to cap it at the smaller legacy size. Otherwise the new FEC counters may show up with garbage values. Reviewed-by: Edwin Peer <[email protected]> Signed-off-by: Michael Chan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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-8
lines changed

4 files changed

+156
-8
lines changed

‎drivers/net/ethernet/broadcom/bnxt/bnxt.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8210,6 +8210,10 @@ static int bnxt_hwrm_port_qstats_ext(struct bnxt *bp, u8 flags)
82108210
if (!rc) {
82118211
bp->fw_rx_stats_ext_size =
82128212
le16_to_cpu(resp_qs->rx_stat_size) / 8;
8213+
if (BNXT_FW_MAJ(bp) < 220 &&
8214+
bp->fw_rx_stats_ext_size > BNXT_RX_STATS_EXT_NUM_LEGACY)
8215+
bp->fw_rx_stats_ext_size = BNXT_RX_STATS_EXT_NUM_LEGACY;
8216+
82138217
bp->fw_tx_stats_ext_size = tx_stat_size ?
82148218
le16_to_cpu(resp_qs->tx_stat_size) / 8 : 0;
82158219
} else {

‎drivers/net/ethernet/broadcom/bnxt/bnxt.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2174,6 +2174,9 @@ struct bnxt {
21742174
#define BNXT_RX_STATS_EXT_OFFSET(counter) \
21752175
(offsetof(struct rx_port_stats_ext, counter) / 8)
21762176

2177+
#define BNXT_RX_STATS_EXT_NUM_LEGACY \
2178+
BNXT_RX_STATS_EXT_OFFSET(rx_fec_corrected_blocks)
2179+
21772180
#define BNXT_TX_STATS_EXT_OFFSET(counter) \
21782181
(offsetof(struct tx_port_stats_ext, counter) / 8)
21792182

‎drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -427,6 +427,8 @@ static const struct {
427427
BNXT_RX_STATS_EXT_ENTRY(rx_pcs_symbol_err),
428428
BNXT_RX_STATS_EXT_ENTRY(rx_corrected_bits),
429429
BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES,
430+
BNXT_RX_STATS_EXT_ENTRY(rx_fec_corrected_blocks),
431+
BNXT_RX_STATS_EXT_ENTRY(rx_fec_uncorrectable_blocks),
430432
};
431433

432434
static const struct {

‎drivers/net/ethernet/broadcom/bnxt/bnxt_hsi.h

Lines changed: 147 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -532,8 +532,8 @@ struct hwrm_err_output {
532532
#define HWRM_VERSION_MAJOR 1
533533
#define HWRM_VERSION_MINOR 10
534534
#define HWRM_VERSION_UPDATE 2
535-
#define HWRM_VERSION_RSVD 52
536-
#define HWRM_VERSION_STR "1.10.2.52"
535+
#define HWRM_VERSION_RSVD 63
536+
#define HWRM_VERSION_STR "1.10.2.63"
537537

538538
/* hwrm_ver_get_input (size:192b/24B) */
539539
struct hwrm_ver_get_input {
@@ -1587,6 +1587,8 @@ struct hwrm_func_qcaps_output {
15871587
#define FUNC_QCAPS_RESP_FLAGS_EXT_DFLT_VLAN_TPID_PCP_SUPPORTED 0x200000UL
15881588
#define FUNC_QCAPS_RESP_FLAGS_EXT_KTLS_SUPPORTED 0x400000UL
15891589
#define FUNC_QCAPS_RESP_FLAGS_EXT_EP_RATE_CONTROL 0x800000UL
1590+
#define FUNC_QCAPS_RESP_FLAGS_EXT_MIN_BW_SUPPORTED 0x1000000UL
1591+
#define FUNC_QCAPS_RESP_FLAGS_EXT_TX_COAL_CMPL_CAP 0x2000000UL
15901592
u8 max_schqs;
15911593
u8 mpc_chnls_cap;
15921594
#define FUNC_QCAPS_RESP_MPC_CHNLS_CAP_TCE 0x1UL
@@ -1956,6 +1958,18 @@ struct hwrm_func_cfg_output {
19561958
u8 valid;
19571959
};
19581960

1961+
/* hwrm_func_cfg_cmd_err (size:64b/8B) */
1962+
struct hwrm_func_cfg_cmd_err {
1963+
u8 code;
1964+
#define FUNC_CFG_CMD_ERR_CODE_UNKNOWN 0x0UL
1965+
#define FUNC_CFG_CMD_ERR_CODE_PARTITION_MIN_BW_RANGE 0x1UL
1966+
#define FUNC_CFG_CMD_ERR_CODE_PARTITION_MIN_MORE_THAN_MAX 0x2UL
1967+
#define FUNC_CFG_CMD_ERR_CODE_PARTITION_MIN_BW_UNSUPPORTED 0x3UL
1968+
#define FUNC_CFG_CMD_ERR_CODE_PARTITION_BW_PERCENT 0x4UL
1969+
#define FUNC_CFG_CMD_ERR_CODE_LAST FUNC_CFG_CMD_ERR_CODE_PARTITION_BW_PERCENT
1970+
u8 unused_0[7];
1971+
};
1972+
19591973
/* hwrm_func_qstats_input (size:192b/24B) */
19601974
struct hwrm_func_qstats_input {
19611975
__le16 req_type;
@@ -3601,7 +3615,15 @@ struct hwrm_port_phy_qcfg_output {
36013615
#define PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASESR4 0x1dUL
36023616
#define PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASELR4 0x1eUL
36033617
#define PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASEER4 0x1fUL
3604-
#define PORT_PHY_QCFG_RESP_PHY_TYPE_LAST PORT_PHY_QCFG_RESP_PHY_TYPE_200G_BASEER4
3618+
#define PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASECR 0x20UL
3619+
#define PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASESR 0x21UL
3620+
#define PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASELR 0x22UL
3621+
#define PORT_PHY_QCFG_RESP_PHY_TYPE_50G_BASEER 0x23UL
3622+
#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASECR2 0x24UL
3623+
#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASESR2 0x25UL
3624+
#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASELR2 0x26UL
3625+
#define PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASEER2 0x27UL
3626+
#define PORT_PHY_QCFG_RESP_PHY_TYPE_LAST PORT_PHY_QCFG_RESP_PHY_TYPE_100G_BASEER2
36053627
u8 media_type;
36063628
#define PORT_PHY_QCFG_RESP_MEDIA_TYPE_UNKNOWN 0x0UL
36073629
#define PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP 0x1UL
@@ -4040,7 +4062,7 @@ struct tx_port_stats_ext {
40404062
__le64 pfc_pri7_tx_transitions;
40414063
};
40424064

4043-
/* rx_port_stats_ext (size:3648b/456B) */
4065+
/* rx_port_stats_ext (size:3776b/472B) */
40444066
struct rx_port_stats_ext {
40454067
__le64 link_down_events;
40464068
__le64 continuous_pause_events;
@@ -4099,6 +4121,8 @@ struct rx_port_stats_ext {
40994121
__le64 rx_discard_packets_cos5;
41004122
__le64 rx_discard_packets_cos6;
41014123
__le64 rx_discard_packets_cos7;
4124+
__le64 rx_fec_corrected_blocks;
4125+
__le64 rx_fec_uncorrectable_blocks;
41024126
};
41034127

41044128
/* hwrm_port_qstats_ext_input (size:320b/40B) */
@@ -4372,7 +4396,10 @@ struct hwrm_port_phy_qcaps_output {
43724396
#define PORT_PHY_QCAPS_RESP_SUPPORTED_PAM4_SPEEDS_FORCE_MODE_50G 0x1UL
43734397
#define PORT_PHY_QCAPS_RESP_SUPPORTED_PAM4_SPEEDS_FORCE_MODE_100G 0x2UL
43744398
#define PORT_PHY_QCAPS_RESP_SUPPORTED_PAM4_SPEEDS_FORCE_MODE_200G 0x4UL
4375-
u8 unused_0[3];
4399+
__le16 flags2;
4400+
#define PORT_PHY_QCAPS_RESP_FLAGS2_PAUSE_UNSUPPORTED 0x1UL
4401+
#define PORT_PHY_QCAPS_RESP_FLAGS2_PFC_UNSUPPORTED 0x2UL
4402+
u8 unused_0[1];
43764403
u8 valid;
43774404
};
43784405

@@ -6076,6 +6103,11 @@ struct hwrm_vnic_qcaps_output {
60766103
#define VNIC_QCAPS_RESP_FLAGS_VIRTIO_NET_VNIC_ALLOC_CAP 0x800UL
60776104
#define VNIC_QCAPS_RESP_FLAGS_METADATA_FORMAT_CAP 0x1000UL
60786105
#define VNIC_QCAPS_RESP_FLAGS_RSS_STRICT_HASH_TYPE_CAP 0x2000UL
6106+
#define VNIC_QCAPS_RESP_FLAGS_RSS_HASH_TYPE_DELTA_CAP 0x4000UL
6107+
#define VNIC_QCAPS_RESP_FLAGS_RSS_HASH_FUNCTION_TOEPLITZ_CAP 0x8000UL
6108+
#define VNIC_QCAPS_RESP_FLAGS_RSS_HASH_FUNCTION_XOR_CAP 0x10000UL
6109+
#define VNIC_QCAPS_RESP_FLAGS_RSS_HASH_FUNCTION_CHKSM_CAP 0x20000UL
6110+
#define VNIC_QCAPS_RESP_FLAGS_RSS_IPV6_FLOW_LABEL_CAP 0x40000UL
60796111
__le16 max_aggs_supported;
60806112
u8 unused_1[5];
60816113
u8 valid;
@@ -6206,7 +6238,15 @@ struct hwrm_vnic_rss_cfg_input {
62066238
__le64 ring_grp_tbl_addr;
62076239
__le64 hash_key_tbl_addr;
62086240
__le16 rss_ctx_idx;
6209-
u8 unused_1[6];
6241+
u8 flags;
6242+
#define VNIC_RSS_CFG_REQ_FLAGS_HASH_TYPE_INCLUDE 0x1UL
6243+
#define VNIC_RSS_CFG_REQ_FLAGS_HASH_TYPE_EXCLUDE 0x2UL
6244+
u8 rss_hash_function;
6245+
#define VNIC_RSS_CFG_REQ_RSS_HASH_FUNCTION_TOEPLITZ 0x0UL
6246+
#define VNIC_RSS_CFG_REQ_RSS_HASH_FUNCTION_XOR 0x1UL
6247+
#define VNIC_RSS_CFG_REQ_RSS_HASH_FUNCTION_CHECKSUM 0x2UL
6248+
#define VNIC_RSS_CFG_REQ_RSS_HASH_FUNCTION_LAST VNIC_RSS_CFG_REQ_RSS_HASH_FUNCTION_CHECKSUM
6249+
u8 unused_1[4];
62106250
};
62116251

62126252
/* hwrm_vnic_rss_cfg_output (size:128b/16B) */
@@ -6331,7 +6371,24 @@ struct hwrm_ring_alloc_input {
63316371
#define RING_ALLOC_REQ_RING_TYPE_RX_AGG 0x4UL
63326372
#define RING_ALLOC_REQ_RING_TYPE_NQ 0x5UL
63336373
#define RING_ALLOC_REQ_RING_TYPE_LAST RING_ALLOC_REQ_RING_TYPE_NQ
6334-
u8 unused_0;
6374+
u8 cmpl_coal_cnt;
6375+
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_OFF 0x0UL
6376+
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_4 0x1UL
6377+
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_8 0x2UL
6378+
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_12 0x3UL
6379+
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_16 0x4UL
6380+
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_24 0x5UL
6381+
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_32 0x6UL
6382+
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_48 0x7UL
6383+
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_64 0x8UL
6384+
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_96 0x9UL
6385+
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_128 0xaUL
6386+
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_192 0xbUL
6387+
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_256 0xcUL
6388+
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_320 0xdUL
6389+
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_384 0xeUL
6390+
#define RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_MAX 0xfUL
6391+
#define RING_ALLOC_REQ_CMPL_COAL_CNT_LAST RING_ALLOC_REQ_CMPL_COAL_CNT_COAL_MAX
63356392
__le16 flags;
63366393
#define RING_ALLOC_REQ_FLAGS_RX_SOP_PAD 0x1UL
63376394
__le64 page_tbl_addr;
@@ -7099,6 +7156,7 @@ struct hwrm_cfa_ntuple_filter_alloc_input {
70997156
#define CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_DEST_FID 0x8UL
71007157
#define CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_ARP_REPLY 0x10UL
71017158
#define CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_DEST_RFS_RING_IDX 0x20UL
7159+
#define CFA_NTUPLE_FILTER_ALLOC_REQ_FLAGS_NO_L2_CONTEXT 0x40UL
71027160
__le32 enables;
71037161
#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_L2_FILTER_ID 0x1UL
71047162
#define CFA_NTUPLE_FILTER_ALLOC_REQ_ENABLES_ETHERTYPE 0x2UL
@@ -7234,6 +7292,7 @@ struct hwrm_cfa_ntuple_filter_cfg_input {
72347292
__le32 flags;
72357293
#define CFA_NTUPLE_FILTER_CFG_REQ_FLAGS_DEST_FID 0x1UL
72367294
#define CFA_NTUPLE_FILTER_CFG_REQ_FLAGS_DEST_RFS_RING_IDX 0x2UL
7295+
#define CFA_NTUPLE_FILTER_CFG_REQ_FLAGS_NO_L2_CONTEXT 0x4UL
72377296
__le64 ntuple_filter_id;
72387297
__le32 new_dst_id;
72397298
__le32 new_mirror_vnic_id;
@@ -7834,11 +7893,11 @@ struct hwrm_cfa_adv_flow_mgnt_qcaps_output {
78347893
#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_TRUFLOW_CAPABLE 0x8000UL
78357894
#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_L2_FILTER_TRAFFIC_TYPE_L2_ROCE_SUPPORTED 0x10000UL
78367895
#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_LAG_SUPPORTED 0x20000UL
7896+
#define CFA_ADV_FLOW_MGNT_QCAPS_RESP_FLAGS_NTUPLE_FLOW_NO_L2CTX_SUPPORTED 0x40000UL
78377897
u8 unused_0[3];
78387898
u8 valid;
78397899
};
78407900

7841-
/* hwrm_tunnel_dst_port_query_input (size:192b/24B) */
78427901
struct hwrm_tunnel_dst_port_query_input {
78437902
__le16 req_type;
78447903
__le16 cmpl_ring;
@@ -8414,6 +8473,86 @@ struct hwrm_fw_get_structured_data_cmd_err {
84148473
u8 unused_0[7];
84158474
};
84168475

8476+
/* hwrm_fw_livepatch_query_input (size:192b/24B) */
8477+
struct hwrm_fw_livepatch_query_input {
8478+
__le16 req_type;
8479+
__le16 cmpl_ring;
8480+
__le16 seq_id;
8481+
__le16 target_id;
8482+
__le64 resp_addr;
8483+
u8 fw_target;
8484+
#define FW_LIVEPATCH_QUERY_REQ_FW_TARGET_COMMON_FW 0x1UL
8485+
#define FW_LIVEPATCH_QUERY_REQ_FW_TARGET_SECURE_FW 0x2UL
8486+
#define FW_LIVEPATCH_QUERY_REQ_FW_TARGET_LAST FW_LIVEPATCH_QUERY_REQ_FW_TARGET_SECURE_FW
8487+
u8 unused_0[7];
8488+
};
8489+
8490+
/* hwrm_fw_livepatch_query_output (size:640b/80B) */
8491+
struct hwrm_fw_livepatch_query_output {
8492+
__le16 error_code;
8493+
__le16 req_type;
8494+
__le16 seq_id;
8495+
__le16 resp_len;
8496+
char install_ver[32];
8497+
char active_ver[32];
8498+
__le16 status_flags;
8499+
#define FW_LIVEPATCH_QUERY_RESP_STATUS_FLAGS_INSTALL 0x1UL
8500+
#define FW_LIVEPATCH_QUERY_RESP_STATUS_FLAGS_ACTIVE 0x2UL
8501+
u8 unused_0[5];
8502+
u8 valid;
8503+
};
8504+
8505+
/* hwrm_fw_livepatch_input (size:256b/32B) */
8506+
struct hwrm_fw_livepatch_input {
8507+
__le16 req_type;
8508+
__le16 cmpl_ring;
8509+
__le16 seq_id;
8510+
__le16 target_id;
8511+
__le64 resp_addr;
8512+
u8 opcode;
8513+
#define FW_LIVEPATCH_REQ_OPCODE_ACTIVATE 0x1UL
8514+
#define FW_LIVEPATCH_REQ_OPCODE_DEACTIVATE 0x2UL
8515+
#define FW_LIVEPATCH_REQ_OPCODE_LAST FW_LIVEPATCH_REQ_OPCODE_DEACTIVATE
8516+
u8 fw_target;
8517+
#define FW_LIVEPATCH_REQ_FW_TARGET_COMMON_FW 0x1UL
8518+
#define FW_LIVEPATCH_REQ_FW_TARGET_SECURE_FW 0x2UL
8519+
#define FW_LIVEPATCH_REQ_FW_TARGET_LAST FW_LIVEPATCH_REQ_FW_TARGET_SECURE_FW
8520+
u8 loadtype;
8521+
#define FW_LIVEPATCH_REQ_LOADTYPE_NVM_INSTALL 0x1UL
8522+
#define FW_LIVEPATCH_REQ_LOADTYPE_MEMORY_DIRECT 0x2UL
8523+
#define FW_LIVEPATCH_REQ_LOADTYPE_LAST FW_LIVEPATCH_REQ_LOADTYPE_MEMORY_DIRECT
8524+
u8 flags;
8525+
__le32 patch_len;
8526+
__le64 host_addr;
8527+
};
8528+
8529+
/* hwrm_fw_livepatch_output (size:128b/16B) */
8530+
struct hwrm_fw_livepatch_output {
8531+
__le16 error_code;
8532+
__le16 req_type;
8533+
__le16 seq_id;
8534+
__le16 resp_len;
8535+
u8 unused_0[7];
8536+
u8 valid;
8537+
};
8538+
8539+
/* hwrm_fw_livepatch_cmd_err (size:64b/8B) */
8540+
struct hwrm_fw_livepatch_cmd_err {
8541+
u8 code;
8542+
#define FW_LIVEPATCH_CMD_ERR_CODE_UNKNOWN 0x0UL
8543+
#define FW_LIVEPATCH_CMD_ERR_CODE_INVALID_OPCODE 0x1UL
8544+
#define FW_LIVEPATCH_CMD_ERR_CODE_INVALID_TARGET 0x2UL
8545+
#define FW_LIVEPATCH_CMD_ERR_CODE_NOT_SUPPORTED 0x3UL
8546+
#define FW_LIVEPATCH_CMD_ERR_CODE_NOT_INSTALLED 0x4UL
8547+
#define FW_LIVEPATCH_CMD_ERR_CODE_NOT_PATCHED 0x5UL
8548+
#define FW_LIVEPATCH_CMD_ERR_CODE_AUTH_FAIL 0x6UL
8549+
#define FW_LIVEPATCH_CMD_ERR_CODE_INVALID_HEADER 0x7UL
8550+
#define FW_LIVEPATCH_CMD_ERR_CODE_INVALID_SIZE 0x8UL
8551+
#define FW_LIVEPATCH_CMD_ERR_CODE_ALREADY_PATCHED 0x9UL
8552+
#define FW_LIVEPATCH_CMD_ERR_CODE_LAST FW_LIVEPATCH_CMD_ERR_CODE_ALREADY_PATCHED
8553+
u8 unused_0[7];
8554+
};
8555+
84178556
/* hwrm_exec_fwd_resp_input (size:1024b/128B) */
84188557
struct hwrm_exec_fwd_resp_input {
84198558
__le16 req_type;

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