|
| 1 | +/****************************************************************************** |
| 2 | + * |
| 3 | + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. |
| 4 | + * |
| 5 | + * This program is free software; you can redistribute it and/or modify it |
| 6 | + * under the terms of version 2 of the GNU General Public License as |
| 7 | + * published by the Free Software Foundation. |
| 8 | + * |
| 9 | + * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | + * more details. |
| 13 | + * |
| 14 | + * You should have received a copy of the GNU General Public License along with |
| 15 | + * this program; if not, write to the Free Software Foundation, Inc., |
| 16 | + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA |
| 17 | + * |
| 18 | + * |
| 19 | + ******************************************************************************/ |
| 20 | +/* |
| 21 | +
|
| 22 | +The purpose of rtw_io.c |
| 23 | +
|
| 24 | +a. provides the API |
| 25 | +
|
| 26 | +b. provides the protocol engine |
| 27 | +
|
| 28 | +c. provides the software interface between caller and the hardware interface |
| 29 | +
|
| 30 | +Compiler Flag Option: |
| 31 | +
|
| 32 | +USB: |
| 33 | + a. USE_ASYNC_IRP: Both sync/async operations are provided. |
| 34 | +
|
| 35 | +Only sync read/rtw_write_mem operations are provided. |
| 36 | +
|
| 37 | + |
| 38 | +
|
| 39 | +*/ |
| 40 | + |
| 41 | +#define _RTW_IO_C_ |
| 42 | +#include <osdep_service.h> |
| 43 | +#include <drv_types.h> |
| 44 | +#include <rtw_io.h> |
| 45 | +#include <osdep_intf.h> |
| 46 | +#include <usb_ops.h> |
| 47 | + |
| 48 | +#define rtw_le16_to_cpu(val) le16_to_cpu(val) |
| 49 | +#define rtw_le32_to_cpu(val) le32_to_cpu(val) |
| 50 | +#define rtw_cpu_to_le16(val) cpu_to_le16(val) |
| 51 | +#define rtw_cpu_to_le32(val) cpu_to_le32(val) |
| 52 | + |
| 53 | +u8 _rtw_read8(struct adapter *adapter, u32 addr) |
| 54 | +{ |
| 55 | + u8 r_val; |
| 56 | + struct io_priv *pio_priv = &adapter->iopriv; |
| 57 | + struct intf_hdl *pintfhdl = &(pio_priv->intf); |
| 58 | + u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr); |
| 59 | + |
| 60 | + |
| 61 | + _read8 = pintfhdl->io_ops._read8; |
| 62 | + r_val = _read8(pintfhdl, addr); |
| 63 | + |
| 64 | + return r_val; |
| 65 | +} |
| 66 | + |
| 67 | +u16 _rtw_read16(struct adapter *adapter, u32 addr) |
| 68 | +{ |
| 69 | + u16 r_val; |
| 70 | + struct io_priv *pio_priv = &adapter->iopriv; |
| 71 | + struct intf_hdl *pintfhdl = &(pio_priv->intf); |
| 72 | + u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr); |
| 73 | + |
| 74 | + _read16 = pintfhdl->io_ops._read16; |
| 75 | + |
| 76 | + r_val = _read16(pintfhdl, addr); |
| 77 | + |
| 78 | + return r_val; |
| 79 | +} |
| 80 | + |
| 81 | +u32 _rtw_read32(struct adapter *adapter, u32 addr) |
| 82 | +{ |
| 83 | + u32 r_val; |
| 84 | + struct io_priv *pio_priv = &adapter->iopriv; |
| 85 | + struct intf_hdl *pintfhdl = &(pio_priv->intf); |
| 86 | + u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr); |
| 87 | + |
| 88 | + _read32 = pintfhdl->io_ops._read32; |
| 89 | + |
| 90 | + r_val = _read32(pintfhdl, addr); |
| 91 | + |
| 92 | + return r_val; |
| 93 | +} |
| 94 | + |
| 95 | +int _rtw_write8(struct adapter *adapter, u32 addr, u8 val) |
| 96 | +{ |
| 97 | + struct io_priv *pio_priv = &adapter->iopriv; |
| 98 | + struct intf_hdl *pintfhdl = &(pio_priv->intf); |
| 99 | + int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val); |
| 100 | + int ret; |
| 101 | + |
| 102 | + _write8 = pintfhdl->io_ops._write8; |
| 103 | + |
| 104 | + ret = _write8(pintfhdl, addr, val); |
| 105 | + |
| 106 | + |
| 107 | + return RTW_STATUS_CODE(ret); |
| 108 | +} |
| 109 | + |
| 110 | +int _rtw_write16(struct adapter *adapter, u32 addr, u16 val) |
| 111 | +{ |
| 112 | + struct io_priv *pio_priv = &adapter->iopriv; |
| 113 | + struct intf_hdl *pintfhdl = &(pio_priv->intf); |
| 114 | + int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val); |
| 115 | + int ret; |
| 116 | + |
| 117 | + _write16 = pintfhdl->io_ops._write16; |
| 118 | + |
| 119 | + ret = _write16(pintfhdl, addr, val); |
| 120 | + |
| 121 | + |
| 122 | + return RTW_STATUS_CODE(ret); |
| 123 | +} |
| 124 | +int _rtw_write32(struct adapter *adapter, u32 addr, u32 val) |
| 125 | +{ |
| 126 | + struct io_priv *pio_priv = &adapter->iopriv; |
| 127 | + struct intf_hdl *pintfhdl = &(pio_priv->intf); |
| 128 | + int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val); |
| 129 | + int ret; |
| 130 | + |
| 131 | + _write32 = pintfhdl->io_ops._write32; |
| 132 | + |
| 133 | + ret = _write32(pintfhdl, addr, val); |
| 134 | + |
| 135 | + |
| 136 | + return RTW_STATUS_CODE(ret); |
| 137 | +} |
| 138 | + |
| 139 | +int _rtw_writeN(struct adapter *adapter, u32 addr , u32 length , u8 *pdata) |
| 140 | +{ |
| 141 | + struct io_priv *pio_priv = &adapter->iopriv; |
| 142 | + struct intf_hdl *pintfhdl = (struct intf_hdl *)(&(pio_priv->intf)); |
| 143 | + int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata); |
| 144 | + int ret; |
| 145 | + |
| 146 | + _writeN = pintfhdl->io_ops._writeN; |
| 147 | + |
| 148 | + ret = _writeN(pintfhdl, addr, length, pdata); |
| 149 | + |
| 150 | + |
| 151 | + return RTW_STATUS_CODE(ret); |
| 152 | +} |
| 153 | +int _rtw_write8_async(struct adapter *adapter, u32 addr, u8 val) |
| 154 | +{ |
| 155 | + struct io_priv *pio_priv = &adapter->iopriv; |
| 156 | + struct intf_hdl *pintfhdl = &(pio_priv->intf); |
| 157 | + int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val); |
| 158 | + int ret; |
| 159 | + |
| 160 | + _write8_async = pintfhdl->io_ops._write8_async; |
| 161 | + |
| 162 | + ret = _write8_async(pintfhdl, addr, val); |
| 163 | + |
| 164 | + |
| 165 | + return RTW_STATUS_CODE(ret); |
| 166 | +} |
| 167 | + |
| 168 | +int _rtw_write16_async(struct adapter *adapter, u32 addr, u16 val) |
| 169 | +{ |
| 170 | + struct io_priv *pio_priv = &adapter->iopriv; |
| 171 | + struct intf_hdl *pintfhdl = &(pio_priv->intf); |
| 172 | + int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val); |
| 173 | + int ret; |
| 174 | + |
| 175 | + _write16_async = pintfhdl->io_ops._write16_async; |
| 176 | + ret = _write16_async(pintfhdl, addr, val); |
| 177 | + |
| 178 | + return RTW_STATUS_CODE(ret); |
| 179 | +} |
| 180 | + |
| 181 | +int _rtw_write32_async(struct adapter *adapter, u32 addr, u32 val) |
| 182 | +{ |
| 183 | + struct io_priv *pio_priv = &adapter->iopriv; |
| 184 | + struct intf_hdl *pintfhdl = &(pio_priv->intf); |
| 185 | + int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val); |
| 186 | + int ret; |
| 187 | + |
| 188 | + _write32_async = pintfhdl->io_ops._write32_async; |
| 189 | + ret = _write32_async(pintfhdl, addr, val); |
| 190 | + |
| 191 | + return RTW_STATUS_CODE(ret); |
| 192 | +} |
| 193 | + |
| 194 | +void _rtw_read_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem) |
| 195 | +{ |
| 196 | + void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); |
| 197 | + struct io_priv *pio_priv = &adapter->iopriv; |
| 198 | + struct intf_hdl *pintfhdl = &(pio_priv->intf); |
| 199 | + |
| 200 | + |
| 201 | + if (adapter->bDriverStopped || adapter->bSurpriseRemoved) { |
| 202 | + RT_TRACE(_module_rtl871x_io_c_, _drv_info_, |
| 203 | + ("rtw_read_mem:bDriverStopped(%d) OR bSurpriseRemoved(%d)", |
| 204 | + adapter->bDriverStopped, adapter->bSurpriseRemoved)); |
| 205 | + return; |
| 206 | + } |
| 207 | + _read_mem = pintfhdl->io_ops._read_mem; |
| 208 | + _read_mem(pintfhdl, addr, cnt, pmem); |
| 209 | + |
| 210 | +} |
| 211 | + |
| 212 | +void _rtw_write_mem(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem) |
| 213 | +{ |
| 214 | + void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); |
| 215 | + struct io_priv *pio_priv = &adapter->iopriv; |
| 216 | + struct intf_hdl *pintfhdl = &(pio_priv->intf); |
| 217 | + |
| 218 | + |
| 219 | + |
| 220 | + _write_mem = pintfhdl->io_ops._write_mem; |
| 221 | + |
| 222 | + _write_mem(pintfhdl, addr, cnt, pmem); |
| 223 | + |
| 224 | + |
| 225 | +} |
| 226 | + |
| 227 | +void _rtw_read_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem) |
| 228 | +{ |
| 229 | + u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); |
| 230 | + struct io_priv *pio_priv = &adapter->iopriv; |
| 231 | + struct intf_hdl *pintfhdl = &(pio_priv->intf); |
| 232 | + |
| 233 | + |
| 234 | + |
| 235 | + if (adapter->bDriverStopped || adapter->bSurpriseRemoved) { |
| 236 | + RT_TRACE(_module_rtl871x_io_c_, _drv_info_, |
| 237 | + ("rtw_read_port:bDriverStopped(%d) OR bSurpriseRemoved(%d)", |
| 238 | + adapter->bDriverStopped, adapter->bSurpriseRemoved)); |
| 239 | + return; |
| 240 | + } |
| 241 | + |
| 242 | + _read_port = pintfhdl->io_ops._read_port; |
| 243 | + |
| 244 | + _read_port(pintfhdl, addr, cnt, pmem); |
| 245 | + |
| 246 | + |
| 247 | +} |
| 248 | + |
| 249 | +void _rtw_read_port_cancel(struct adapter *adapter) |
| 250 | +{ |
| 251 | + void (*_read_port_cancel)(struct intf_hdl *pintfhdl); |
| 252 | + struct io_priv *pio_priv = &adapter->iopriv; |
| 253 | + struct intf_hdl *pintfhdl = &(pio_priv->intf); |
| 254 | + |
| 255 | + _read_port_cancel = pintfhdl->io_ops._read_port_cancel; |
| 256 | + |
| 257 | + if (_read_port_cancel) |
| 258 | + _read_port_cancel(pintfhdl); |
| 259 | +} |
| 260 | + |
| 261 | +u32 _rtw_write_port(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem) |
| 262 | +{ |
| 263 | + u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); |
| 264 | + struct io_priv *pio_priv = &adapter->iopriv; |
| 265 | + struct intf_hdl *pintfhdl = &(pio_priv->intf); |
| 266 | + u32 ret = _SUCCESS; |
| 267 | + |
| 268 | + |
| 269 | + |
| 270 | + _write_port = pintfhdl->io_ops._write_port; |
| 271 | + |
| 272 | + ret = _write_port(pintfhdl, addr, cnt, pmem); |
| 273 | + |
| 274 | + |
| 275 | + |
| 276 | + return ret; |
| 277 | +} |
| 278 | + |
| 279 | +u32 _rtw_write_port_and_wait(struct adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms) |
| 280 | +{ |
| 281 | + int ret = _SUCCESS; |
| 282 | + struct xmit_buf *pxmitbuf = (struct xmit_buf *)pmem; |
| 283 | + struct submit_ctx sctx; |
| 284 | + |
| 285 | + rtw_sctx_init(&sctx, timeout_ms); |
| 286 | + pxmitbuf->sctx = &sctx; |
| 287 | + |
| 288 | + ret = _rtw_write_port(adapter, addr, cnt, pmem); |
| 289 | + |
| 290 | + if (ret == _SUCCESS) |
| 291 | + ret = rtw_sctx_wait(&sctx); |
| 292 | + |
| 293 | + return ret; |
| 294 | +} |
| 295 | + |
| 296 | +void _rtw_write_port_cancel(struct adapter *adapter) |
| 297 | +{ |
| 298 | + void (*_write_port_cancel)(struct intf_hdl *pintfhdl); |
| 299 | + struct io_priv *pio_priv = &adapter->iopriv; |
| 300 | + struct intf_hdl *pintfhdl = &(pio_priv->intf); |
| 301 | + |
| 302 | + _write_port_cancel = pintfhdl->io_ops._write_port_cancel; |
| 303 | + |
| 304 | + if (_write_port_cancel) |
| 305 | + _write_port_cancel(pintfhdl); |
| 306 | +} |
| 307 | + |
| 308 | +int rtw_init_io_priv(struct adapter *padapter, void (*set_intf_ops)(struct _io_ops *pops)) |
| 309 | +{ |
| 310 | + struct io_priv *piopriv = &padapter->iopriv; |
| 311 | + struct intf_hdl *pintf = &piopriv->intf; |
| 312 | + |
| 313 | + if (set_intf_ops == NULL) |
| 314 | + return _FAIL; |
| 315 | + |
| 316 | + piopriv->padapter = padapter; |
| 317 | + pintf->padapter = padapter; |
| 318 | + pintf->pintf_dev = adapter_to_dvobj(padapter); |
| 319 | + |
| 320 | + set_intf_ops(&pintf->io_ops); |
| 321 | + |
| 322 | + return _SUCCESS; |
| 323 | +} |
0 commit comments