feat: walk in page tables

Author: criskell

Cargo.lock

@@ -1,10 +1,10 @@
 [package]
 name = "osdev_rust"
 version = "0.1.0"
-edition = "2021"
+edition = "2024"
 
 [dependencies]
-bootloader = "0.9"
+bootloader = { version = "0.9", features = ["map_physical_memory"] }
 volatile = "0.2.6"
 spin = "0.5.2"
 x86_64 = "0.14.2"

Cargo.toml

@@ -0,0 +1,5 @@
+# osdev_rust
+
+`rustup component add llvm-tools-preview`
+`cargo install bootimage`
+`cargo run`

README.md

@@ -9,6 +9,7 @@ use core::panic::PanicInfo;
 
 pub mod gdt;
 pub mod interrupts;
+pub mod memory;
 pub mod serial;
 pub mod vga_buffer;
 
@@ -58,8 +59,13 @@ pub fn hlt_loop() -> ! {
 }
 
 #[cfg(test)]
-#[no_mangle]
-pub extern "C" fn _start() -> ! {
+use bootloader::{BootInfo, entry_point};
+
+#[cfg(test)]
+entry_point!(test_kernel_main);
+
+#[cfg(test)]
+fn test_kernel_main(_boot_info: &'static BootInfo) -> ! {
     init();
     test_main();
     hlt_loop();

src/lib.rs

@@ -1,18 +1,44 @@
+#![no_std]
+#![no_main]
 #![feature(custom_test_frameworks)]
 #![test_runner(osdev_rust::test_runner)]
 #![reexport_test_harness_main = "test_main"]
-#![no_std]
-#![no_main]
 
+use bootloader::{BootInfo, entry_point};
 use core::panic::PanicInfo;
 use osdev_rust::println;
 
-#[no_mangle]
-pub extern "C" fn _start() -> ! {
+entry_point!(kernel_main);
+
+fn kernel_main(boot_info: &'static BootInfo) -> ! {
+    use osdev_rust::memory::active_level_4_table;
+    use x86_64::VirtAddr;
+    use x86_64::structures::paging::PageTable;
+
     println!("Hello World!");
 
     osdev_rust::init();
 
+    let phys_mem_offset = VirtAddr::new(boot_info.physical_memory_offset);
+    let l4_table = unsafe { active_level_4_table(phys_mem_offset) };
+
+    for (i, entry) in l4_table.iter().enumerate() {
+        if !entry.is_unused() {
+            println!("L4 Entry: {}: {:?}", i, entry);
+
+            let phys = entry.frame().unwrap().start_address();
+            let virt = phys.as_u64() + boot_info.physical_memory_offset;
+            let ptr = VirtAddr::new(virt).as_mut_ptr();
+            let l3_table: &PageTable = unsafe { &*ptr };
+
+            for (i, entry) in l3_table.iter().enumerate() {
+                if !entry.is_unused() {
+                    println!("  L3 Entry {}: {:?}", i, entry);
+                }
+            }
+        }
+    }
+
     #[cfg(test)]
     test_main();
 

src/main.rs

@@ -0,0 +1,50 @@
+use core::panic;
+
+use x86_64::{PhysAddr, VirtAddr, structures::paging::PageTable};
+
+pub unsafe fn active_level_4_table(physical_memory_offset: VirtAddr) -> &'static mut PageTable {
+    use x86_64::registers::control::Cr3;
+
+    let (level_4_table_frame, _) = Cr3::read();
+
+    let phys = level_4_table_frame.start_address();
+    let virt = physical_memory_offset + phys.as_u64();
+    let page_table_ptr: *mut PageTable = virt.as_mut_ptr();
+
+    unsafe { &mut *page_table_ptr }
+}
+
+pub unsafe fn translate_addr(addr: VirtAddr, physical_memory_offset: VirtAddr) -> Option<PhysAddr> {
+    translate_addr_inner(addr, physical_memory_offset);
+}
+
+fn translate_addr_inner(addr: VirtAddr, physical_memory_offset: VirtAddr) -> Option<PhysAddr> {
+    use x86_64::registers::control::Cr3;
+    use x86_64::structures::paging::page_table::FrameError;
+
+    let (level_4_table_frame, _) = Cr3::read();
+
+    let table_indexes = [
+        addr.p4_index(),
+        addr.p3_index(),
+        addr.p2_index(),
+        addr.p1_index(),
+    ];
+    let mut frame = level_4_table_frame;
+
+    for &index in &table_indexes {
+        let virt = physical_memory_offset + frame.start_address().as_u64();
+        let table_ptr: *const PageTable = virt.as_ptr();
+        let table = unsafe { &*table_ptr };
+
+        let entry = &table[index];
+
+        frame = match entry.frame() {
+            Ok(frame) => frame,
+            Err(FrameError::FrameNotPresent) => return None,
+            Err(FrameError::HugeFrame) => panic!("Huge frames not supported"),
+        };
+    }
+
+    Some(frame.start_address() + u64::from(addr.page_offset()))
+}