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[ARM] Add Cortex-A32 support
Adding Cortex-A32 as an available target in the ARM backend. Patch by Sam Parker. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@263956 91177308-0d34-0410-b5e6-96231b3b80d8
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‎include/llvm/Support/ARMTargetParser.def‎

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@@ -215,6 +215,7 @@ ARM_CPU_NAME("sc300", AK_ARMV7M, FK_NONE, false, AEK_NONE)
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ARM_CPU_NAME("cortex-m3", AK_ARMV7M, FK_NONE, true, AEK_NONE)
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ARM_CPU_NAME("cortex-m4", AK_ARMV7EM, FK_FPV4_SP_D16, true, AEK_NONE)
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ARM_CPU_NAME("cortex-m7", AK_ARMV7EM, FK_FPV5_D16, false, AEK_NONE)
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ARM_CPU_NAME("cortex-a32", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC)
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ARM_CPU_NAME("cortex-a35", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC)
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ARM_CPU_NAME("cortex-a53", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, true, AEK_CRC)
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ARM_CPU_NAME("cortex-a57", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC)

‎lib/Target/ARM/ARM.td‎

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@@ -252,6 +252,8 @@ def ProcA15 : SubtargetFeature<"a15", "ARMProcFamily", "CortexA15",
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"Cortex-A15 ARM processors", []>;
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def ProcA17 : SubtargetFeature<"a17", "ARMProcFamily", "CortexA17",
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"Cortex-A17 ARM processors", []>;
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def ProcA32 : SubtargetFeature<"a32", "ARMProcFamily", "CortexA32",
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"Cortex-A32 ARM processors", []>;
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def ProcA35 : SubtargetFeature<"a35", "ARMProcFamily", "CortexA35",
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"Cortex-A35 ARM processors", []>;
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def ProcA53 : SubtargetFeature<"a53", "ARMProcFamily", "CortexA53",
@@ -651,6 +653,12 @@ def : ProcNoItin<"cortex-m7", [ARMv7em,
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FeatureFPARMv8,
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FeatureD16]>;
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def : ProcNoItin<"cortex-a32", [ARMv8a,
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FeatureHWDiv,
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FeatureHWDivARM,
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FeatureT2XtPk,
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FeatureCrypto,
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FeatureCRC]>;
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def : ProcNoItin<"cortex-a35", [ARMv8a, ProcA35,
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FeatureHWDiv,

‎lib/Target/ARM/ARMSubtarget.h‎

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@@ -43,8 +43,8 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
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protected:
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enum ARMProcFamilyEnum {
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Others, CortexA5, CortexA7, CortexA8, CortexA9, CortexA12, CortexA15,
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CortexA17, CortexR4, CortexR4F, CortexR5, CortexR7, CortexA35, CortexA53,
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CortexA57, CortexA72, Krait, Swift, ExynosM1
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CortexA17, CortexR4, CortexR4F, CortexR5, CortexR7, CortexA32, CortexA35,
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CortexA53, CortexA57, CortexA72, Krait, Swift, ExynosM1
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};
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enum ARMProcClassEnum {
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None, AClass, RClass, MClass

‎test/CodeGen/ARM/build-attributes.ll‎

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@@ -108,6 +108,9 @@
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; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 | FileCheck %s --check-prefix=CORTEX-R8
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; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R8-FAST
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; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=CORTEX-A32
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A32-FAST
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
@@ -147,6 +150,8 @@
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; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
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; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
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; ARMv8a (AArch32)
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; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
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; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
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; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
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; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
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; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
@@ -1246,6 +1251,36 @@
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; CORTEX-R8-FAST-NOT: .eabi_attribute 22
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; CORTEX-R8-FAST: .eabi_attribute 23, 1
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; CORTEX-A32: .cpu cortex-a32
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; CORTEX-A32: .eabi_attribute 6, 14
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; CORTEX-A32: .eabi_attribute 7, 65
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; CORTEX-A32: .eabi_attribute 8, 1
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; CORTEX-A32: .eabi_attribute 9, 2
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; CORTEX-A32: .fpu crypto-neon-fp-armv8
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; CORTEX-A32: .eabi_attribute 12, 3
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; CORTEX-A32-NOT: .eabi_attribute 19
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;; We default to IEEE 754 compliance
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; CORTEX-A32: .eabi_attribute 20, 1
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; CORTEX-A32: .eabi_attribute 21, 1
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; CORTEX-A32-NOT: .eabi_attribute 22
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; CORTEX-A32: .eabi_attribute 23, 3
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; CORTEX-A32: .eabi_attribute 24, 1
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; CORTEX-A32: .eabi_attribute 25, 1
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; CORTEX-A32-NOT: .eabi_attribute 27
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; CORTEX-A32-NOT: .eabi_attribute 28
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; CORTEX-A32: .eabi_attribute 36, 1
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; CORTEX-A32: .eabi_attribute 38, 1
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; CORTEX-A32: .eabi_attribute 42, 1
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; CORTEX-A32-NOT: .eabi_attribute 44
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; CORTEX-A32: .eabi_attribute 68, 3
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; CORTEX-A32-FAST-NOT: .eabi_attribute 19
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;; The A32 has the ARMv8 FP unit, which always flushes preserving sign.
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; CORTEX-A32-FAST: .eabi_attribute 20, 2
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; CORTEX-A32-FAST-NOT: .eabi_attribute 21
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; CORTEX-A32-FAST-NOT: .eabi_attribute 22
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; CORTEX-A32-FAST: .eabi_attribute 23, 1
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; CORTEX-A35: .cpu cortex-a35
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; CORTEX-A35: .eabi_attribute 6, 14
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; CORTEX-A35: .eabi_attribute 7, 65

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