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kbsmith-intelkbsmith-intel
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[X86] More test updates to support fixup-byte-word-insts optimization
either on or off. Differential Revisions: http://reviews.llvm.org/D17458 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@261505 91177308-0d34-0410-b5e6-96231b3b80d8
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+38
-19
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5 files changed

+38
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‎test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,11 @@
1-
; RUN: llc < %s -march=x86 | FileCheck %s
1+
; RUN: llc < %s -march=x86 -fixup-byte-word-insts=0 | FileCheck %s -check-prefix=CHECK -check-prefix=BWOFF
2+
; RUN: llc < %s -march=x86 -fixup-byte-word-insts=1 | FileCheck %s -check-prefix=CHECK -check-prefix=BWON
23
; These transforms are turned off for load volatiles and stores.
34
; Check that they weren't turned off for all loads and stores!
45
; CHECK-LABEL: f:
56
; CHECK-NOT: movsd
6-
; CHECK: movw
7+
; BWOFF: movw
8+
; BWON: movzwl
79
; CHECK: addw
810

911
@atomic = global double 0.000000e+00 ; <double*> [#uses=1]

‎test/CodeGen/X86/MergeConsecutiveStores.ll‎

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,5 @@
1-
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s
1+
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -fixup-byte-word-insts=1 < %s | FileCheck -check-prefix=CHECK -check-prefix=BWON %s
2+
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -fixup-byte-word-insts=0 < %s | FileCheck -check-prefix=CHECK -check-prefix=BWOFF %s
23
; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -addr-sink-using-gep=1 < %s | FileCheck %s
34

45
%struct.A = type { i8, i8, i8, i8, i8, i8, i8, i8 }
@@ -147,7 +148,8 @@ define void @merge_nonconst_store(i32 %count, i8 %zz, %struct.A* nocapture %p) n
147148

148149
; CHECK-LABEL: merge_loads_i16:
149150
; load:
150-
; CHECK: movw
151+
; BWON: movzwl
152+
; BWOFF: movw
151153
; store:
152154
; CHECK: movw
153155
; CHECK: ret
@@ -180,7 +182,8 @@ define void @merge_loads_i16(i32 %count, %struct.A* noalias nocapture %q, %struc
180182

181183
; The loads and the stores are interleaved. Can't merge them.
182184
; CHECK-LABEL: no_merge_loads:
183-
; CHECK: movb
185+
; BWON: movzbl
186+
; BWOFF: movb
184187
; CHECK: movb
185188
; CHECK: movb
186189
; CHECK: movb

‎test/CodeGen/X86/half.ll‎

Lines changed: 10 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1,14 +1,17 @@
1-
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c -asm-verbose=false \
2-
; RUN: | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LIBCALL
3-
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c -asm-verbose=false \
4-
; RUN: | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-F16C
5-
; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr +sse2 -asm-verbose=false \
1+
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c -asm-verbose=false -fixup-byte-word-insts=1 \
2+
; RUN: | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LIBCALL -check-prefix=BWON
3+
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=-f16c -asm-verbose=false -fixup-byte-word-insts=0 \
4+
; RUN: | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LIBCALL -check-prefix=BWOFF
5+
; RUN: llc < %s -march=x86-64 -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -mattr=+f16c -asm-verbose=false -fixup-byte-word-insts=1 \
6+
; RUN: | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-F16C -check-prefix=BWON
7+
; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr +sse2 -asm-verbose=false -fixup-byte-word-insts=0 \
68
; RUN: | FileCheck %s -check-prefix=CHECK-I686
79

810
define void @test_load_store(half* %in, half* %out) {
911
; CHECK-LABEL: test_load_store:
10-
; CHECK: movw (%rdi), [[TMP:%[a-z0-9]+]]
11-
; CHECK: movw [[TMP]], (%rsi)
12+
; BWON: movzwl (%rdi), %eax
13+
; BWOFF: movw (%rdi), %ax
14+
; CHECK: movw %ax, (%rsi)
1215
%val = load half, half* %in
1316
store half %val, half* %out
1417
ret void

‎test/CodeGen/X86/return-ext.ll‎

Lines changed: 10 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,11 @@
1-
; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s
2-
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
1+
; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -fixup-byte-word-insts=0 | \
2+
; RUN: FileCheck -check-prefix=CHECK -check-prefix=BWOFF %s
3+
; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -fixup-byte-word-insts=1 | \
4+
; RUN: FileCheck -check-prefix=CHECK -check-prefix=BWON %s
5+
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -fixup-byte-word-insts=0 | \
6+
; RUN: FileCheck -check-prefix=CHECK -check-prefix=BWOFF %s
7+
; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -fixup-byte-word-insts=1 | \
8+
; RUN: FileCheck -check-prefix=CHECK -check-prefix=BWON %s
39
; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck -check-prefix=DARWIN %s
410

511

@@ -71,7 +77,8 @@ entry:
7177

7278
; i16 return values are not extended.
7379
; CHECK-LABEL: unsigned_i16:
74-
; CHECK: movw
80+
; BWOFF: movw
81+
; BWON: movzwl
7582
; CHECK-NEXT: addw
7683
; CHECK-NEXT: ret
7784

‎test/CodeGen/X86/store-narrow.ll‎

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,7 @@
11
; rdar://7860110
22
; RUN: llc -asm-verbose=false < %s | FileCheck %s -check-prefix=X64
3-
; RUN: llc -march=x86 -asm-verbose=false < %s | FileCheck %s -check-prefix=X32
3+
; RUN: llc -march=x86 -asm-verbose=false -fixup-byte-word-insts=1 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWON
4+
; RUN: llc -march=x86 -asm-verbose=false -fixup-byte-word-insts=0 < %s | FileCheck %s -check-prefix=X32 -check-prefix=X32-BWOFF
45
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
56
target triple = "x86_64-apple-darwin10.2"
67

@@ -50,7 +51,8 @@ entry:
5051
; X64: movw %si, (%rdi)
5152

5253
; X32-LABEL: test3:
53-
; X32: movw 8(%esp), %ax
54+
; X32-BWON: movzwl 8(%esp), %eax
55+
; X32-BWOFF: movw 8(%esp), %ax
5456
; X32: movw %ax, (%{{.*}})
5557
}
5658

@@ -67,7 +69,8 @@ entry:
6769
; X64: movw %si, 2(%rdi)
6870

6971
; X32-LABEL: test4:
70-
; X32: movw 8(%esp), %[[REG:[abcd]]]x
72+
; X32-BWON: movzwl 8(%esp), %e[[REG:[abcd]]]x
73+
; X32-BWOFF: movw 8(%esp), %[[REG:[abcd]]]x
7174
; X32: movw %[[REG]]x, 2(%{{.*}})
7275
}
7376

@@ -84,7 +87,8 @@ entry:
8487
; X64: movw %si, 2(%rdi)
8588

8689
; X32-LABEL: test5:
87-
; X32: movw 8(%esp), %[[REG:[abcd]]]x
90+
; X32-BWON: movzwl 8(%esp), %e[[REG:[abcd]]]x
91+
; X32-BWOFF: movw 8(%esp), %[[REG:[abcd]]]x
8892
; X32: movw %[[REG]]x, 2(%{{.*}})
8993
}
9094

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