Commit fa0d2a8
[RegAlloc] Constrain rematted regclass to use (llvm#164386)
When rematting we create a new virtual register with the original def's
register class. However the use may have a different register class if
the interval is split, which means we end up with an invalid register
class.
This fixes llvm#164181 by constraining the newly created register to the
use's register class.
The test case is reduced as far as it goes. Because this test requires
us to reach a certain amount of register pressure in certain conditions
I'm not sure if there's an easy way to handwrite this scenario.1 parent caf6c6b commit fa0d2a8
File tree
2 files changed
+643
-0
lines changed- llvm
- lib/CodeGen
- test/CodeGen/AArch64
2 files changed
+643
-0
lines changed| Original file line number | Diff line number | Diff line change | |
|---|---|---|---|
| |||
721 | 721 | | |
722 | 722 | | |
723 | 723 | | |
| 724 | + | |
| 725 | + | |
| 726 | + | |
724 | 727 | | |
725 | 728 | | |
726 | 729 | | |
| |||
0 commit comments