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spi: add driver for BCM2835
The BCM2835 contains two forms of SPI master controller (one known simply as SPI0, and the other known as the "Universal SPI Master", in the auxilliary block) and one form of SPI slave controller. This patch adds support for the SPI0 controller. This driver is taken from Chris Boot's repository at git://github.com/bootc/linux.git rpi-linear as of commit 6de2905 "spi-bcm2708: fix printf with spurious %s". In the first SPI-related commit there, Chris wrote: Thanks to csoutreach / A Robinson for his driver which I used as an inspiration. You can find his version here: http://piface.openlx.org.uk/raspberry-pi-spi-kernel-driver-available-for Changes made during upstreaming: * Renamed bcm2708 to bcm2835 as per upstream naming for this SoC. * Removed support for brcm,realtime property. * Increased transfer timeout to 30 seconds. * Return IRQ_NONE from the IRQ handler if no interrupt was handled. * Disable TA (Transfer Active) and clear FIFOs on a transfer timeout. * Wrote device tree binding documentation. * Request unnamed clock rather than "sys_pclk"; the DT will provide the correct clock. * Assume that tfr->speed_hz and tfr->bits_per_word are always set in bcm2835_spi_start_transfer(), bcm2835_spi_transfer_one(), so no need to check spi->speed_hz or tft->bits_per_word. * Re-ordered probe() to remove the need for temporary variables. * Call clk_disable_unprepare() rather than just clk_unprepare() on probe() failure. * Don't use devm_request_irq(), to ensure that the IRQ doesn't fire after we've torn down the device, but not unhooked the IRQ. * Moved probe()'s call to clk_prepare_enable() so we can be sure the clock is enabled if the IRQ handler fires immediately. * Remove redundant checks from bcm2835_spi_check_transfer() and bcm2835_spi_setup(). * Re-ordered IRQ handler to check for RXR before DONE. Added comments to ISR. * Removed empty prepare/unprepare implementations. * Removed use of devinit/devexit. * Added BCM2835_ prefix to defines. Signed-off-by: Chris Boot <[email protected]> Signed-off-by: Stephen Warren <[email protected]> Signed-off-by: Mark Brown <[email protected]>
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Broadcom BCM2835 SPI0 controller
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The BCM2835 contains two forms of SPI master controller, one known simply as
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SPI0, and the other known as the "Universal SPI Master"; part of the
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auxilliary block. This binding applies to the SPI0 controller.
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Required properties:
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- compatible: Should be "brcm,bcm2835-spi".
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- reg: Should contain register location and length.
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- interrupts: Should contain interrupt.
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- clocks: The clock feeding the SPI controller.
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Example:
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spi@20204000 {
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compatible = "brcm,bcm2835-spi";
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reg = <0x7e204000 0x1000>;
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interrupts = <2 22>;
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clocks = <&clk_spi>;
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#address-cells = <1>;
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#size-cells = <0>;
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};

drivers/spi/Kconfig

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@@ -74,6 +74,17 @@ config SPI_ATMEL
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This selects a driver for the Atmel SPI Controller, present on
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many AT32 (AVR32) and AT91 (ARM) chips.
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config SPI_BCM2835
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tristate "BCM2835 SPI controller"
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depends on ARCH_BCM2835
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help
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This selects a driver for the Broadcom BCM2835 SPI master.
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The BCM2835 contains two types of SPI master controller; the
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"universal SPI master", and the regular SPI controller. This driver
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is for the regular SPI controller. Slave mode operation is not also
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not supported.
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config SPI_BFIN5XX
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tristate "SPI controller driver for ADI Blackfin5xx"
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depends on BLACKFIN

drivers/spi/Makefile

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obj-$(CONFIG_SPI_ATMEL) += spi-atmel.o
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obj-$(CONFIG_SPI_ATH79) += spi-ath79.o
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obj-$(CONFIG_SPI_AU1550) += spi-au1550.o
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obj-$(CONFIG_SPI_BCM2835) += spi-bcm2835.o
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obj-$(CONFIG_SPI_BCM63XX) += spi-bcm63xx.o
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obj-$(CONFIG_SPI_BFIN5XX) += spi-bfin5xx.o
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obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o

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