1- // SPDX-License-Identifier: GPL-2.0
1+ // SPDX-License-Identifier: GPL
22/* Intel FPGA HSSI-SS interface API
3- * Copyright (C) 2022 Intel Corporation. All rights reserved
3+ * Copyright (C) 2022,2023 Intel Corporation. All rights reserved
44 *
55 * Contributors:
66 * Preetam Narayan
@@ -224,6 +224,21 @@ void hssi_set_bit(struct platform_device *pdev,
224224 hssi_csrwr32 (pdev , regbank , chan , offset , value );
225225}
226226
227+ void hssi_set_bit_atomic (struct platform_device * pdev ,
228+ enum tile_reg_type regbank ,
229+ u32 chan ,
230+ u32 offset ,
231+ u32 bit_mask ) {
232+ u32 value ;
233+
234+ value = hssi_csrrd32_atomic (pdev , regbank , chan , offset );
235+
236+ value |= bit_mask ;
237+
238+ hssi_csrwr32_atomic (pdev , regbank , chan , offset , value );
239+ }
240+
241+
227242void hssi_clear_bit (struct platform_device * pdev ,
228243 enum tile_reg_type regbank ,
229244 u32 chan ,
@@ -238,6 +253,20 @@ void hssi_clear_bit(struct platform_device *pdev,
238253 hssi_csrwr32 (pdev , regbank , chan , offset , value );
239254}
240255
256+ void hssi_clear_bit_atomic (struct platform_device * pdev ,
257+ enum tile_reg_type regbank ,
258+ u32 chan ,
259+ u32 offset ,
260+ u32 bit_mask ) {
261+ u32 value ;
262+
263+ value = hssi_csrrd32_atomic (pdev , regbank , chan , offset );
264+
265+ value &= ~bit_mask ;
266+
267+ hssi_csrwr32_atomic (pdev , regbank , chan , offset , value );
268+ }
269+
241270bool hssi_bit_is_set (struct platform_device * pdev ,
242271 enum tile_reg_type regbank ,
243272 u32 chan ,
@@ -350,7 +379,17 @@ int hssi_dis_serial_loopback(struct platform_device *pdev, u32 chan)
350379 return ret_status ;
351380}
352381
353- bool hssi_ethport_is_stable (struct platform_device * pdev , u32 chan ) {
382+ #if 0
383+ void hssi_disable_hotplug (struct platform_device * pdev ) {
384+ hssiss_hotplug_enable (pdev , false);
385+ }
386+
387+ void hssi_enable_hotplug (struct platform_device * pdev ) {
388+ hssiss_hotplug_enable (pdev , true);
389+ }
390+ #endif
391+
392+ bool hssi_ethport_is_stable (struct platform_device * pdev , u32 chan , bool logging ) {
354393
355394 bool retstatus ;
356395 hssi_eth_port_sts pstatus ;
@@ -364,6 +403,12 @@ bool hssi_ethport_is_stable(struct platform_device *pdev, u32 chan) {
364403 pstatus .part .rx_pcs_ready &
365404 pstatus .part .tx_pll_locked ;
366405
406+ /* only print if the logging is enabled */
407+ /* logging is needed only at start up */
408+ if (logging == false) {
409+ goto res ;
410+ }
411+
367412 if (!retstatus ) {
368413
369414 dev_err (& pdev -> dev ,
@@ -379,6 +424,6 @@ bool hssi_ethport_is_stable(struct platform_device *pdev, u32 chan) {
379424 pstatus .part .tx_lanes_stable ,
380425 pstatus .part .rx_pcs_ready ,
381426 pstatus .part .tx_pll_locked );
382-
427+ res :
383428 return retstatus ;
384429}
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