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aeglIngo Molnar
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EDAC/sb_edac: Fix computation of channel address
Large memory Haswell-EX systems with multiple DIMMs per channel were sometimes reporting the wrong DIMM. Found three problems: 1) Debug printouts for socket and channel interleave were not interpreting the register fields correctly. The socket interleave field is a 2^X value (0=1, 1=2, 2=4, 3=8). The channel interleave is X+1 (0=1, 1=2, 2=3. 3=4). 2) Actual use of the socket interleave value didn't interpret as 2^X 3) Conversion of address to channel address was complicated, and wrong. Signed-off-by: Tony Luck <[email protected]> Acked-by: Aristeu Rozanski <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Mauro Carvalho Chehab <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Ingo Molnar <[email protected]>
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drivers/edac/sb_edac.c

Lines changed: 10 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -1839,8 +1839,8 @@ static void get_memory_layout(const struct mem_ctl_info *mci)
18391839
edac_dbg(0, "TAD#%d: up to %u.%03u GB (0x%016Lx), socket interleave %d, memory interleave %d, TGT: %d, %d, %d, %d, reg=0x%08x\n",
18401840
n_tads, gb, (mb*1000)/1024,
18411841
((u64)tmp_mb) << 20L,
1842-
(u32)TAD_SOCK(reg),
1843-
(u32)TAD_CH(reg),
1842+
(u32)(1 << TAD_SOCK(reg)),
1843+
(u32)TAD_CH(reg) + 1,
18441844
(u32)TAD_TGT0(reg),
18451845
(u32)TAD_TGT1(reg),
18461846
(u32)TAD_TGT2(reg),
@@ -2118,7 +2118,7 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
21182118
}
21192119

21202120
ch_way = TAD_CH(reg) + 1;
2121-
sck_way = TAD_SOCK(reg) + 1;
2121+
sck_way = 1 << TAD_SOCK(reg);
21222122

21232123
if (ch_way == 3)
21242124
idx = addr >> 6;
@@ -2175,7 +2175,7 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
21752175
n_tads,
21762176
addr,
21772177
limit,
2178-
(u32)TAD_SOCK(reg),
2178+
sck_way,
21792179
ch_way,
21802180
offset,
21812181
idx,
@@ -2190,18 +2190,12 @@ static int get_memory_error_data(struct mem_ctl_info *mci,
21902190
offset, addr);
21912191
return -EINVAL;
21922192
}
2193-
addr -= offset;
2194-
/* Store the low bits [0:6] of the addr */
2195-
ch_addr = addr & 0x7f;
2196-
/* Remove socket wayness and remove 6 bits */
2197-
addr >>= 6;
2198-
addr = div_u64(addr, sck_xch);
2199-
#if 0
2200-
/* Divide by channel way */
2201-
addr = addr / ch_way;
2202-
#endif
2203-
/* Recover the last 6 bits */
2204-
ch_addr |= addr << 6;
2193+
2194+
ch_addr = addr - offset;
2195+
ch_addr >>= (6 + shiftup);
2196+
ch_addr /= ch_way * sck_way;
2197+
ch_addr <<= (6 + shiftup);
2198+
ch_addr |= addr & ((1 << (6 + shiftup)) - 1);
22052199

22062200
/*
22072201
* Step 3) Decode rank

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