HSD #1308655004: don't clear the ue/ce status bits

When there is a uncorrected or double-bit error, the kernel will panic
and will result in a watchdog reset. When the SDM gets the reset, it
needs to know that a DBE had occurred so it can scrub the DDR on a
reboot. Thus we should not clear the CE/UE status bits in the EDAC.

Signed-off-by: Dinh Nguyen <[email protected]>

Author: dinguyen702

drivers/edac/synopsys_edac.c

@@ -455,7 +455,6 @@ static int zynqmp_get_error_info(struct synps_edac_priv *priv)
 out:
 	clearval = ECC_CTRL_CLR_CE_ERR | ECC_CTRL_CLR_CE_ERRCNT;
 	clearval |= ECC_CTRL_CLR_UE_ERR | ECC_CTRL_CLR_UE_ERRCNT;
-	writel(clearval, base + ECC_CLR_OFST);
 	writel(0x0, base + ECC_CLR_OFST);
 
 	return 0;