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Hariprasad Shenaidavem330
Hariprasad Shenai
authored and
davem330
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cxgb4: Added support in debugfs to dump sge_qinfo
Signed-off-by: Hariprasad Shenai <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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+215
-2
lines changed

3 files changed

+215
-2
lines changed

‎drivers/net/ethernet/chelsio/cxgb4/cxgb4.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1029,6 +1029,8 @@ int cxgb4_t4_bar2_sge_qregs(struct adapter *adapter,
10291029
u64 *pbar2_qoffset,
10301030
unsigned int *pbar2_qid);
10311031

1032+
unsigned int qtimer_val(const struct adapter *adap,
1033+
const struct sge_rspq *q);
10321034
int t4_init_sge_params(struct adapter *adapter);
10331035
int t4_init_tp_params(struct adapter *adap);
10341036
int t4_filter_field_shift(const struct adapter *adap, int filter_sel);

‎drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c‎

Lines changed: 211 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1026,6 +1026,216 @@ static const struct file_operations rss_vf_config_debugfs_fops = {
10261026
.release = seq_release_private
10271027
};
10281028

1029+
static int sge_qinfo_show(struct seq_file *seq, void *v)
1030+
{
1031+
struct adapter *adap = seq->private;
1032+
int eth_entries = DIV_ROUND_UP(adap->sge.ethqsets, 4);
1033+
int toe_entries = DIV_ROUND_UP(adap->sge.ofldqsets, 4);
1034+
int rdma_entries = DIV_ROUND_UP(adap->sge.rdmaqs, 4);
1035+
int ciq_entries = DIV_ROUND_UP(adap->sge.rdmaciqs, 4);
1036+
int ctrl_entries = DIV_ROUND_UP(MAX_CTRL_QUEUES, 4);
1037+
int i, r = (uintptr_t)v - 1;
1038+
int toe_idx = r - eth_entries;
1039+
int rdma_idx = toe_idx - toe_entries;
1040+
int ciq_idx = rdma_idx - rdma_entries;
1041+
int ctrl_idx = ciq_idx - ciq_entries;
1042+
int fq_idx = ctrl_idx - ctrl_entries;
1043+
1044+
if (r)
1045+
seq_putc(seq, '\n');
1046+
1047+
#define S3(fmt_spec, s, v) \
1048+
do { \
1049+
seq_printf(seq, "%-12s", s); \
1050+
for (i = 0; i < n; ++i) \
1051+
seq_printf(seq, " %16" fmt_spec, v); \
1052+
seq_putc(seq, '\n'); \
1053+
} while (0)
1054+
#define S(s, v) S3("s", s, v)
1055+
#define T(s, v) S3("u", s, tx[i].v)
1056+
#define R(s, v) S3("u", s, rx[i].v)
1057+
1058+
if (r < eth_entries) {
1059+
int base_qset = r * 4;
1060+
const struct sge_eth_rxq *rx = &adap->sge.ethrxq[base_qset];
1061+
const struct sge_eth_txq *tx = &adap->sge.ethtxq[base_qset];
1062+
int n = min(4, adap->sge.ethqsets - 4 * r);
1063+
1064+
S("QType:", "Ethernet");
1065+
S("Interface:",
1066+
rx[i].rspq.netdev ? rx[i].rspq.netdev->name : "N/A");
1067+
T("TxQ ID:", q.cntxt_id);
1068+
T("TxQ size:", q.size);
1069+
T("TxQ inuse:", q.in_use);
1070+
T("TxQ CIDX:", q.cidx);
1071+
T("TxQ PIDX:", q.pidx);
1072+
#ifdef CONFIG_CXGB4_DCB
1073+
T("DCB Prio:", dcb_prio);
1074+
S3("u", "DCB PGID:",
1075+
(ethqset2pinfo(adap, base_qset + i)->dcb.pgid >>
1076+
4*(7-tx[i].dcb_prio)) & 0xf);
1077+
S3("u", "DCB PFC:",
1078+
(ethqset2pinfo(adap, base_qset + i)->dcb.pfcen >>
1079+
1*(7-tx[i].dcb_prio)) & 0x1);
1080+
#endif
1081+
R("RspQ ID:", rspq.abs_id);
1082+
R("RspQ size:", rspq.size);
1083+
R("RspQE size:", rspq.iqe_len);
1084+
R("RspQ CIDX:", rspq.cidx);
1085+
R("RspQ Gen:", rspq.gen);
1086+
S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1087+
S3("u", "Intr pktcnt:",
1088+
adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1089+
R("FL ID:", fl.cntxt_id);
1090+
R("FL size:", fl.size - 8);
1091+
R("FL pend:", fl.pend_cred);
1092+
R("FL avail:", fl.avail);
1093+
R("FL PIDX:", fl.pidx);
1094+
R("FL CIDX:", fl.cidx);
1095+
} else if (toe_idx < toe_entries) {
1096+
const struct sge_ofld_rxq *rx = &adap->sge.ofldrxq[toe_idx * 4];
1097+
const struct sge_ofld_txq *tx = &adap->sge.ofldtxq[toe_idx * 4];
1098+
int n = min(4, adap->sge.ofldqsets - 4 * toe_idx);
1099+
1100+
S("QType:", "TOE");
1101+
T("TxQ ID:", q.cntxt_id);
1102+
T("TxQ size:", q.size);
1103+
T("TxQ inuse:", q.in_use);
1104+
T("TxQ CIDX:", q.cidx);
1105+
T("TxQ PIDX:", q.pidx);
1106+
R("RspQ ID:", rspq.abs_id);
1107+
R("RspQ size:", rspq.size);
1108+
R("RspQE size:", rspq.iqe_len);
1109+
R("RspQ CIDX:", rspq.cidx);
1110+
R("RspQ Gen:", rspq.gen);
1111+
S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1112+
S3("u", "Intr pktcnt:",
1113+
adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1114+
R("FL ID:", fl.cntxt_id);
1115+
R("FL size:", fl.size - 8);
1116+
R("FL pend:", fl.pend_cred);
1117+
R("FL avail:", fl.avail);
1118+
R("FL PIDX:", fl.pidx);
1119+
R("FL CIDX:", fl.cidx);
1120+
} else if (rdma_idx < rdma_entries) {
1121+
const struct sge_ofld_rxq *rx =
1122+
&adap->sge.rdmarxq[rdma_idx * 4];
1123+
int n = min(4, adap->sge.rdmaqs - 4 * rdma_idx);
1124+
1125+
S("QType:", "RDMA-CPL");
1126+
R("RspQ ID:", rspq.abs_id);
1127+
R("RspQ size:", rspq.size);
1128+
R("RspQE size:", rspq.iqe_len);
1129+
R("RspQ CIDX:", rspq.cidx);
1130+
R("RspQ Gen:", rspq.gen);
1131+
S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1132+
S3("u", "Intr pktcnt:",
1133+
adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1134+
R("FL ID:", fl.cntxt_id);
1135+
R("FL size:", fl.size - 8);
1136+
R("FL pend:", fl.pend_cred);
1137+
R("FL avail:", fl.avail);
1138+
R("FL PIDX:", fl.pidx);
1139+
R("FL CIDX:", fl.cidx);
1140+
} else if (ciq_idx < ciq_entries) {
1141+
const struct sge_ofld_rxq *rx = &adap->sge.rdmaciq[ciq_idx * 4];
1142+
int n = min(4, adap->sge.rdmaciqs - 4 * ciq_idx);
1143+
1144+
S("QType:", "RDMA-CIQ");
1145+
R("RspQ ID:", rspq.abs_id);
1146+
R("RspQ size:", rspq.size);
1147+
R("RspQE size:", rspq.iqe_len);
1148+
R("RspQ CIDX:", rspq.cidx);
1149+
R("RspQ Gen:", rspq.gen);
1150+
S3("u", "Intr delay:", qtimer_val(adap, &rx[i].rspq));
1151+
S3("u", "Intr pktcnt:",
1152+
adap->sge.counter_val[rx[i].rspq.pktcnt_idx]);
1153+
} else if (ctrl_idx < ctrl_entries) {
1154+
const struct sge_ctrl_txq *tx = &adap->sge.ctrlq[ctrl_idx * 4];
1155+
int n = min(4, adap->params.nports - 4 * ctrl_idx);
1156+
1157+
S("QType:", "Control");
1158+
T("TxQ ID:", q.cntxt_id);
1159+
T("TxQ size:", q.size);
1160+
T("TxQ inuse:", q.in_use);
1161+
T("TxQ CIDX:", q.cidx);
1162+
T("TxQ PIDX:", q.pidx);
1163+
} else if (fq_idx == 0) {
1164+
const struct sge_rspq *evtq = &adap->sge.fw_evtq;
1165+
1166+
seq_printf(seq, "%-12s %16s\n", "QType:", "FW event queue");
1167+
seq_printf(seq, "%-12s %16u\n", "RspQ ID:", evtq->abs_id);
1168+
seq_printf(seq, "%-12s %16u\n", "RspQ size:", evtq->size);
1169+
seq_printf(seq, "%-12s %16u\n", "RspQE size:", evtq->iqe_len);
1170+
seq_printf(seq, "%-12s %16u\n", "RspQ CIDX:", evtq->cidx);
1171+
seq_printf(seq, "%-12s %16u\n", "RspQ Gen:", evtq->gen);
1172+
seq_printf(seq, "%-12s %16u\n", "Intr delay:",
1173+
qtimer_val(adap, evtq));
1174+
seq_printf(seq, "%-12s %16u\n", "Intr pktcnt:",
1175+
adap->sge.counter_val[evtq->pktcnt_idx]);
1176+
}
1177+
#undef R
1178+
#undef T
1179+
#undef S
1180+
#undef S3
1181+
return 0;
1182+
}
1183+
1184+
static int sge_queue_entries(const struct adapter *adap)
1185+
{
1186+
return DIV_ROUND_UP(adap->sge.ethqsets, 4) +
1187+
DIV_ROUND_UP(adap->sge.ofldqsets, 4) +
1188+
DIV_ROUND_UP(adap->sge.rdmaqs, 4) +
1189+
DIV_ROUND_UP(adap->sge.rdmaciqs, 4) +
1190+
DIV_ROUND_UP(MAX_CTRL_QUEUES, 4) + 1;
1191+
}
1192+
1193+
static void *sge_queue_start(struct seq_file *seq, loff_t *pos)
1194+
{
1195+
int entries = sge_queue_entries(seq->private);
1196+
1197+
return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
1198+
}
1199+
1200+
static void sge_queue_stop(struct seq_file *seq, void *v)
1201+
{
1202+
}
1203+
1204+
static void *sge_queue_next(struct seq_file *seq, void *v, loff_t *pos)
1205+
{
1206+
int entries = sge_queue_entries(seq->private);
1207+
1208+
++*pos;
1209+
return *pos < entries ? (void *)((uintptr_t)*pos + 1) : NULL;
1210+
}
1211+
1212+
static const struct seq_operations sge_qinfo_seq_ops = {
1213+
.start = sge_queue_start,
1214+
.next = sge_queue_next,
1215+
.stop = sge_queue_stop,
1216+
.show = sge_qinfo_show
1217+
};
1218+
1219+
static int sge_qinfo_open(struct inode *inode, struct file *file)
1220+
{
1221+
int res = seq_open(file, &sge_qinfo_seq_ops);
1222+
1223+
if (!res) {
1224+
struct seq_file *seq = file->private_data;
1225+
1226+
seq->private = inode->i_private;
1227+
}
1228+
return res;
1229+
}
1230+
1231+
static const struct file_operations sge_qinfo_debugfs_fops = {
1232+
.owner = THIS_MODULE,
1233+
.open = sge_qinfo_open,
1234+
.read = seq_read,
1235+
.llseek = seq_lseek,
1236+
.release = seq_release,
1237+
};
1238+
10291239
int mem_open(struct inode *inode, struct file *file)
10301240
{
10311241
unsigned int mem;
@@ -1135,6 +1345,7 @@ int t4_setup_debugfs(struct adapter *adap)
11351345
{ "rss_key", &rss_key_debugfs_fops, S_IRUSR, 0 },
11361346
{ "rss_pf_config", &rss_pf_config_debugfs_fops, S_IRUSR, 0 },
11371347
{ "rss_vf_config", &rss_vf_config_debugfs_fops, S_IRUSR, 0 },
1348+
{ "sge_qinfo", &sge_qinfo_debugfs_fops, S_IRUSR, 0 },
11381349
#if IS_ENABLED(CONFIG_IPV6)
11391350
{ "clip_tbl", &clip_tbl_debugfs_fops, S_IRUSR, 0 },
11401351
#endif

‎drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2500,8 +2500,8 @@ static int closest_thres(const struct sge *s, int thres)
25002500
/*
25012501
* Return a queue's interrupt hold-off time in us. 0 means no timer.
25022502
*/
2503-
static unsigned int qtimer_val(const struct adapter *adap,
2504-
const struct sge_rspq *q)
2503+
unsigned int qtimer_val(const struct adapter *adap,
2504+
const struct sge_rspq *q)
25052505
{
25062506
unsigned int idx = q->intr_params >> 1;
25072507

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