FogBugz #189684-2: dts part: clean up QSPI entries

Moves the base QSPI dts entry into socfpga.dtsi and add board specific QSPI
entry to the appropriate board file DTS files.

Removes the hard-coded clock frequency.

Signed-off-by: Dinh Nguyen <[email protected]>

Author: Dinh Nguyen

arch/arm/boot/dts/socfpga.dtsi

@@ -707,6 +707,21 @@
 			};
 		};
 
+		qspi: spi@ff705000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "cadence,qspi";
+			reg = <0xff705000 0x1000>,
+				<0xffa00000 0x1000>;
+			interrupts = <0 151 4>;
+			clocks = <&qspi_clk>;
+			ext-decoder = <0>;  /* external decoder */
+			num-chipselect = <4>;
+			fifo-depth = <128>;
+			bus-num = <2>;
+			status = "disabled";
+		};
+
 		rstmgr@ffd05000 {
 			compatible = "altr,rst-mgr", "syscon";
 			reg = <0xffd05000 0x1000>;

arch/arm/boot/dts/socfpga_arria5.dts

@@ -71,48 +71,6 @@
 			status = "okay";
 		};
 
-		qspi: spi@ff705000 {
-			compatible = "cadence,qspi";
-                        #address-cells = <1>;
-			#size-cells = <0>;
-			reg = <0xff705000 0x1000>,
-				<0xffa00000 0x1000>;
-			interrupts = <0 151 4>;
-			master-ref-clk = <400000000>;
-			ext-decoder = <0>;  /* external decoder */
-			num-chipselect = <4>;
-			fifo-depth = <128>;
-			bus-num = <2>;
-
-			flash0: n25q512a@0 {
-				#address-cells = <1>;
-				#size-cells = <1>;
-				compatible = "n25q512a";
-				reg = <0>;      /* chip select */
-				spi-max-frequency = <100000000>;
-				m25p,fast-read;
-				page-size = <256>;
-				block-size = <16>; /* 2^16, 64KB */
-				read-delay = <4>;  /* delay value in read data capture register */
-				tshsl-ns = <50>;
-				tsd2d-ns = <50>;
-				tchsh-ns = <4>;
-				tslch-ns = <4>;
-
-				partition@qspi-boot {
-					/* 8MB for raw data. */
-					label = "Flash 0 Raw Data";
-					reg = <0x0 0x800000>;
-				};
-				partition@qspi-rootfs {
-					/* 56MB for jffs2 data. */
-					label = "Flash 0 jffs2 Filesystem";
-					reg = <0x800000 0x3800000>;
-				};
-			};
-
-		};
-
 		timer0@ffc08000 {
 			clock-frequency = <100000000>;
 		};
@@ -190,3 +148,34 @@
 		reg = <0x68>;
 	};
 };
+
+&qspi {
+	status = "okay";
+	flash0: n25q512a@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "n25q512a";
+		reg = <0>;      /* chip select */
+		spi-max-frequency = <100000000>;
+		m25p,fast-read;
+		page-size = <256>;
+		block-size = <16>; /* 2^16, 64KB */
+		read-delay = <4>;  /* delay value in read data capture register */
+		tshsl-ns = <50>;
+		tsd2d-ns = <50>;
+		tchsh-ns = <4>;
+		tslch-ns = <4>;
+
+		partition@qspi-boot {
+			/* 8MB for raw data. */
+			label = "Flash 0 Raw Data";
+			reg = <0x0 0x800000>;
+		};
+
+		partition@qspi-rootfs {
+			/* 56MB for jffs2 data. */
+			label = "Flash 0 jffs2 Filesystem";
+			reg = <0x800000 0x3800000>;
+		};
+	};
+};

arch/arm/boot/dts/socfpga_cyclone5.dts

@@ -75,47 +75,6 @@
 			status = "okay";
 		};
 
-		qspi: spi@ff705000 {
-			compatible = "cadence,qspi";
-                        #address-cells = <1>;
-			#size-cells = <0>;
-			reg = <0xff705000 0x1000>,
-				<0xffa00000 0x1000>;
-			interrupts = <0 151 4>;
-			master-ref-clk = <400000000>;
-			ext-decoder = <0>;  /* external decoder */
-			num-chipselect = <4>;
-			fifo-depth = <128>;
-			bus-num = <2>;
-
-			flash0: n25q00@0 {
-				#address-cells = <1>;
-				#size-cells = <1>;
-				compatible = "n25q00";
-				reg = <0>;      /* chip select */
-				spi-max-frequency = <100000000>;
-				m25p,fast-read;
-				page-size = <256>;
-				block-size = <16>; /* 2^16, 64KB */
-				read-delay = <4>;  /* delay value in read data capture register */
-				tshsl-ns = <50>;
-				tsd2d-ns = <50>;
-				tchsh-ns = <4>;
-				tslch-ns = <4>;
-
-				partition@qspi-boot {
-					/* 8MB for raw data. */
-					label = "Flash 0 Raw Data";
-					reg = <0x0 0x800000>;
-				};
-				partition@qspi-rootfs {
-					/* 120MB for jffs2 data. */
-					label = "Flash 0 jffs2 Filesystem";
-					reg = <0x800000 0x7800000>;
-				};
-			};
-		};
-
 		serial0@ffc02000 {
 			status = "okay";
 		};
@@ -193,3 +152,34 @@
 	snps,max-mtu = <3800>;
 	status = "okay";
 };
+
+&qspi {
+	status = "okay";
+	flash0: n25q00@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "n25q00";
+		reg = <0>;      /* chip select */
+		spi-max-frequency = <100000000>;
+		m25p,fast-read;
+		page-size = <256>;
+		block-size = <16>; /* 2^16, 64KB */
+		read-delay = <4>;  /* delay value in read data capture register */
+		tshsl-ns = <50>;
+		tsd2d-ns = <50>;
+		tchsh-ns = <4>;
+		tslch-ns = <4>;
+
+		partition@qspi-boot {
+		/* 8MB for raw data. */
+		label = "Flash 0 Raw Data";
+		reg = <0x0 0x800000>;
+		};
+
+		partition@qspi-rootfs {
+		/* 120MB for jffs2 data. */
+		label = "Flash 0 jffs2 Filesystem";
+		reg = <0x800000 0x7800000>;
+		};
+	};
+};