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| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/gpio/gpio-latch.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: GPIO latch controller |
| 8 | + |
| 9 | +maintainers: |
| 10 | + - Sascha Hauer <[email protected]> |
| 11 | + |
| 12 | +description: | |
| 13 | + This binding describes a GPIO multiplexer based on latches connected to |
| 14 | + other GPIOs, like this: |
| 15 | +
|
| 16 | + CLK0 ----------------------. ,--------. |
| 17 | + CLK1 -------------------. `--------|> #0 | |
| 18 | + | | | |
| 19 | + OUT0 ----------------+--|-----------|D0 Q0|-----|< |
| 20 | + OUT1 --------------+-|--|-----------|D1 Q1|-----|< |
| 21 | + OUT2 ------------+-|-|--|-----------|D2 Q2|-----|< |
| 22 | + OUT3 ----------+-|-|-|--|-----------|D3 Q3|-----|< |
| 23 | + OUT4 --------+-|-|-|-|--|-----------|D4 Q4|-----|< |
| 24 | + OUT5 ------+-|-|-|-|-|--|-----------|D5 Q5|-----|< |
| 25 | + OUT6 ----+-|-|-|-|-|-|--|-----------|D6 Q6|-----|< |
| 26 | + OUT7 --+-|-|-|-|-|-|-|--|-----------|D7 Q7|-----|< |
| 27 | + | | | | | | | | | `--------' |
| 28 | + | | | | | | | | | |
| 29 | + | | | | | | | | | ,--------. |
| 30 | + | | | | | | | | `-----------|> #1 | |
| 31 | + | | | | | | | | | | |
| 32 | + | | | | | | | `--------------|D0 Q0|-----|< |
| 33 | + | | | | | | `----------------|D1 Q1|-----|< |
| 34 | + | | | | | `------------------|D2 Q2|-----|< |
| 35 | + | | | | `--------------------|D3 Q3|-----|< |
| 36 | + | | | `----------------------|D4 Q4|-----|< |
| 37 | + | | `------------------------|D5 Q5|-----|< |
| 38 | + | `--------------------------|D6 Q6|-----|< |
| 39 | + `----------------------------|D7 Q7|-----|< |
| 40 | + `--------' |
| 41 | +
|
| 42 | + The number of clk-gpios and latched-gpios is not fixed. The actual number |
| 43 | + of number of latches and the number of inputs per latch is derived from |
| 44 | + the number of GPIOs given in the corresponding device tree properties. |
| 45 | +
|
| 46 | +properties: |
| 47 | + compatible: |
| 48 | + const: gpio-latch |
| 49 | + "#gpio-cells": |
| 50 | + const: 2 |
| 51 | + |
| 52 | + clk-gpios: |
| 53 | + description: Array of GPIOs to be used to clock a latch |
| 54 | + |
| 55 | + latched-gpios: |
| 56 | + description: Array of GPIOs to be used as inputs per latch |
| 57 | + |
| 58 | + setup-duration-ns: |
| 59 | + description: Delay in nanoseconds to wait after the latch inputs have been |
| 60 | + set up |
| 61 | + |
| 62 | + clock-duration-ns: |
| 63 | + description: Delay in nanoseconds to wait between clock output changes |
| 64 | + |
| 65 | + gpio-controller: true |
| 66 | + |
| 67 | + gpio-line-names: true |
| 68 | + |
| 69 | +required: |
| 70 | + - compatible |
| 71 | + - "#gpio-cells" |
| 72 | + - gpio-controller |
| 73 | + - clk-gpios |
| 74 | + - latched-gpios |
| 75 | + |
| 76 | +additionalProperties: false |
| 77 | + |
| 78 | +examples: |
| 79 | + - | |
| 80 | + gpio-latch { |
| 81 | + #gpio-cells = <2>; |
| 82 | + pinctrl-names = "default"; |
| 83 | + pinctrl-0 = <&pinctrl_di_do_leds>; |
| 84 | + compatible = "gpio-latch"; |
| 85 | + gpio-controller; |
| 86 | + setup-duration-ns = <100>; |
| 87 | + clock-duration-ns = <100>; |
| 88 | +
|
| 89 | + clk-gpios = <&gpio3 7 0>, <&gpio3 8 0>; |
| 90 | + latched-gpios = <&gpio3 21 0>, <&gpio3 22 0>, |
| 91 | + <&gpio3 23 0>, <&gpio3 24 0>, |
| 92 | + <&gpio3 25 0>, <&gpio3 26 0>, |
| 93 | + <&gpio3 27 0>, <&gpio3 28 0>; |
| 94 | + }; |
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