Skip to content

Commit baf6332

Browse files
Nicolas Ferretorvalds
authored andcommitted
atmel_lcdfb: fix pixclock divider calculation
Fix divider calculation and allow CLKVAL = 0 (divisor 2) It was not possible to get the clock value 0 (divisor 2) because the test "<=0" force the BYPASS bit to be activated instead. [[email protected]: coding-style fixes] Signed-off-by: Nicolas Ferre <[email protected]> Cc: Per Hedblom <[email protected]> Cc: Roel Kluin <[email protected]> Cc: Jan Weber <[email protected]> Cc: Andrew Victor <[email protected]> Cc: Haavard Skinnemoen <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
1 parent 945185a commit baf6332

File tree

1 file changed

+6
-5
lines changed

1 file changed

+6
-5
lines changed

drivers/video/atmel_lcdfb.c

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -441,14 +441,15 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
441441

442442
value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
443443

444-
value = (value / 2) - 1;
445-
dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", value);
446-
447-
if (value <= 0) {
444+
if (value < 2) {
448445
dev_notice(info->device, "Bypassing pixel clock divider\n");
449446
lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
450447
} else {
451-
lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET);
448+
value = (value / 2) - 1;
449+
dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
450+
value);
451+
lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
452+
value << ATMEL_LCDC_CLKVAL_OFFSET);
452453
info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
453454
dev_dbg(info->device, " updated pixclk: %lu KHz\n",
454455
PICOS2KHZ(info->var.pixclock));

0 commit comments

Comments
 (0)