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| 1 | +/* |
| 2 | + * QLogic iSCSI HBA Driver |
| 3 | + * Copyright (c) 2003-2006 QLogic Corporation |
| 4 | + * |
| 5 | + * See LICENSE.qla4xxx for copyright and licensing details. |
| 6 | + */ |
| 7 | + |
| 8 | +#include "ql4_def.h" |
| 9 | +#include <scsi/scsi_dbg.h> |
| 10 | + |
| 11 | +static void qla4xxx_print_srb_info(struct srb * srb) |
| 12 | +{ |
| 13 | + printk("%s: srb = 0x%p, flags=0x%02x\n", __func__, srb, srb->flags); |
| 14 | + printk("%s: cmd = 0x%p, saved_dma_handle = 0x%lx\n", |
| 15 | + __func__, srb->cmd, (unsigned long) srb->dma_handle); |
| 16 | + printk("%s: fw_ddb_index = %d, lun = %d\n", |
| 17 | + __func__, srb->fw_ddb_index, srb->cmd->device->lun); |
| 18 | + printk("%s: iocb_tov = %d\n", |
| 19 | + __func__, srb->iocb_tov); |
| 20 | + printk("%s: cc_stat = 0x%x, r_start = 0x%lx, u_start = 0x%lx\n\n", |
| 21 | + __func__, srb->cc_stat, srb->r_start, srb->u_start); |
| 22 | +} |
| 23 | + |
| 24 | +void qla4xxx_print_scsi_cmd(struct scsi_cmnd *cmd) |
| 25 | +{ |
| 26 | + printk("SCSI Command = 0x%p, Handle=0x%p\n", cmd, cmd->host_scribble); |
| 27 | + printk(" b=%d, t=%02xh, l=%02xh, cmd_len = %02xh\n", |
| 28 | + cmd->device->channel, cmd->device->id, cmd->device->lun, |
| 29 | + cmd->cmd_len); |
| 30 | + scsi_print_command(cmd); |
| 31 | + printk(" seg_cnt = %d\n", cmd->use_sg); |
| 32 | + printk(" request buffer = 0x%p, request buffer len = 0x%x\n", |
| 33 | + cmd->request_buffer, cmd->request_bufflen); |
| 34 | + if (cmd->use_sg) { |
| 35 | + struct scatterlist *sg; |
| 36 | + sg = (struct scatterlist *)cmd->request_buffer; |
| 37 | + printk(" SG buffer: \n"); |
| 38 | + qla4xxx_dump_buffer((caddr_t) sg, |
| 39 | + (cmd->use_sg * sizeof(*sg))); |
| 40 | + } |
| 41 | + printk(" tag = %d, transfersize = 0x%x \n", cmd->tag, |
| 42 | + cmd->transfersize); |
| 43 | + printk(" Pid = %d, SP = 0x%p\n", (int)cmd->pid, cmd->SCp.ptr); |
| 44 | + printk(" underflow size = 0x%x, direction=0x%x\n", cmd->underflow, |
| 45 | + cmd->sc_data_direction); |
| 46 | + printk(" Current time (jiffies) = 0x%lx, " |
| 47 | + "timeout expires = 0x%lx\n", jiffies, cmd->eh_timeout.expires); |
| 48 | + qla4xxx_print_srb_info((struct srb *) cmd->SCp.ptr); |
| 49 | +} |
| 50 | + |
| 51 | +void __dump_registers(struct scsi_qla_host *ha) |
| 52 | +{ |
| 53 | + uint8_t i; |
| 54 | + for (i = 0; i < MBOX_REG_COUNT; i++) { |
| 55 | + printk(KERN_INFO "0x%02X mailbox[%d] = 0x%08X\n", |
| 56 | + (uint8_t) offsetof(struct isp_reg, mailbox[i]), i, |
| 57 | + readw(&ha->reg->mailbox[i])); |
| 58 | + } |
| 59 | + printk(KERN_INFO "0x%02X flash_address = 0x%08X\n", |
| 60 | + (uint8_t) offsetof(struct isp_reg, flash_address), |
| 61 | + readw(&ha->reg->flash_address)); |
| 62 | + printk(KERN_INFO "0x%02X flash_data = 0x%08X\n", |
| 63 | + (uint8_t) offsetof(struct isp_reg, flash_data), |
| 64 | + readw(&ha->reg->flash_data)); |
| 65 | + printk(KERN_INFO "0x%02X ctrl_status = 0x%08X\n", |
| 66 | + (uint8_t) offsetof(struct isp_reg, ctrl_status), |
| 67 | + readw(&ha->reg->ctrl_status)); |
| 68 | + if (is_qla4010(ha)) { |
| 69 | + printk(KERN_INFO "0x%02X nvram = 0x%08X\n", |
| 70 | + (uint8_t) offsetof(struct isp_reg, u1.isp4010.nvram), |
| 71 | + readw(&ha->reg->u1.isp4010.nvram)); |
| 72 | + } |
| 73 | + |
| 74 | + else if (is_qla4022(ha)) { |
| 75 | + printk(KERN_INFO "0x%02X intr_mask = 0x%08X\n", |
| 76 | + (uint8_t) offsetof(struct isp_reg, |
| 77 | + u1.isp4022.intr_mask), |
| 78 | + readw(&ha->reg->u1.isp4022.intr_mask)); |
| 79 | + printk(KERN_INFO "0x%02X nvram = 0x%08X\n", |
| 80 | + (uint8_t) offsetof(struct isp_reg, u1.isp4022.nvram), |
| 81 | + readw(&ha->reg->u1.isp4022.nvram)); |
| 82 | + printk(KERN_INFO "0x%02X semaphore = 0x%08X\n", |
| 83 | + (uint8_t) offsetof(struct isp_reg, |
| 84 | + u1.isp4022.semaphore), |
| 85 | + readw(&ha->reg->u1.isp4022.semaphore)); |
| 86 | + } |
| 87 | + printk(KERN_INFO "0x%02X req_q_in = 0x%08X\n", |
| 88 | + (uint8_t) offsetof(struct isp_reg, req_q_in), |
| 89 | + readw(&ha->reg->req_q_in)); |
| 90 | + printk(KERN_INFO "0x%02X rsp_q_out = 0x%08X\n", |
| 91 | + (uint8_t) offsetof(struct isp_reg, rsp_q_out), |
| 92 | + readw(&ha->reg->rsp_q_out)); |
| 93 | + if (is_qla4010(ha)) { |
| 94 | + printk(KERN_INFO "0x%02X ext_hw_conf = 0x%08X\n", |
| 95 | + (uint8_t) offsetof(struct isp_reg, |
| 96 | + u2.isp4010.ext_hw_conf), |
| 97 | + readw(&ha->reg->u2.isp4010.ext_hw_conf)); |
| 98 | + printk(KERN_INFO "0x%02X port_ctrl = 0x%08X\n", |
| 99 | + (uint8_t) offsetof(struct isp_reg, |
| 100 | + u2.isp4010.port_ctrl), |
| 101 | + readw(&ha->reg->u2.isp4010.port_ctrl)); |
| 102 | + printk(KERN_INFO "0x%02X port_status = 0x%08X\n", |
| 103 | + (uint8_t) offsetof(struct isp_reg, |
| 104 | + u2.isp4010.port_status), |
| 105 | + readw(&ha->reg->u2.isp4010.port_status)); |
| 106 | + printk(KERN_INFO "0x%02X req_q_out = 0x%08X\n", |
| 107 | + (uint8_t) offsetof(struct isp_reg, |
| 108 | + u2.isp4010.req_q_out), |
| 109 | + readw(&ha->reg->u2.isp4010.req_q_out)); |
| 110 | + printk(KERN_INFO "0x%02X gp_out = 0x%08X\n", |
| 111 | + (uint8_t) offsetof(struct isp_reg, u2.isp4010.gp_out), |
| 112 | + readw(&ha->reg->u2.isp4010.gp_out)); |
| 113 | + printk(KERN_INFO "0x%02X gp_in = 0x%08X\n", |
| 114 | + (uint8_t) offsetof(struct isp_reg, u2.isp4010.gp_in), |
| 115 | + readw(&ha->reg->u2.isp4010.gp_in)); |
| 116 | + printk(KERN_INFO "0x%02X port_err_status = 0x%08X\n", |
| 117 | + (uint8_t) offsetof(struct isp_reg, |
| 118 | + u2.isp4010.port_err_status), |
| 119 | + readw(&ha->reg->u2.isp4010.port_err_status)); |
| 120 | + } |
| 121 | + |
| 122 | + else if (is_qla4022(ha)) { |
| 123 | + printk(KERN_INFO "Page 0 Registers:\n"); |
| 124 | + printk(KERN_INFO "0x%02X ext_hw_conf = 0x%08X\n", |
| 125 | + (uint8_t) offsetof(struct isp_reg, |
| 126 | + u2.isp4022.p0.ext_hw_conf), |
| 127 | + readw(&ha->reg->u2.isp4022.p0.ext_hw_conf)); |
| 128 | + printk(KERN_INFO "0x%02X port_ctrl = 0x%08X\n", |
| 129 | + (uint8_t) offsetof(struct isp_reg, |
| 130 | + u2.isp4022.p0.port_ctrl), |
| 131 | + readw(&ha->reg->u2.isp4022.p0.port_ctrl)); |
| 132 | + printk(KERN_INFO "0x%02X port_status = 0x%08X\n", |
| 133 | + (uint8_t) offsetof(struct isp_reg, |
| 134 | + u2.isp4022.p0.port_status), |
| 135 | + readw(&ha->reg->u2.isp4022.p0.port_status)); |
| 136 | + printk(KERN_INFO "0x%02X gp_out = 0x%08X\n", |
| 137 | + (uint8_t) offsetof(struct isp_reg, |
| 138 | + u2.isp4022.p0.gp_out), |
| 139 | + readw(&ha->reg->u2.isp4022.p0.gp_out)); |
| 140 | + printk(KERN_INFO "0x%02X gp_in = 0x%08X\n", |
| 141 | + (uint8_t) offsetof(struct isp_reg, u2.isp4022.p0.gp_in), |
| 142 | + readw(&ha->reg->u2.isp4022.p0.gp_in)); |
| 143 | + printk(KERN_INFO "0x%02X port_err_status = 0x%08X\n", |
| 144 | + (uint8_t) offsetof(struct isp_reg, |
| 145 | + u2.isp4022.p0.port_err_status), |
| 146 | + readw(&ha->reg->u2.isp4022.p0.port_err_status)); |
| 147 | + printk(KERN_INFO "Page 1 Registers:\n"); |
| 148 | + writel(HOST_MEM_CFG_PAGE & set_rmask(CSR_SCSI_PAGE_SELECT), |
| 149 | + &ha->reg->ctrl_status); |
| 150 | + printk(KERN_INFO "0x%02X req_q_out = 0x%08X\n", |
| 151 | + (uint8_t) offsetof(struct isp_reg, |
| 152 | + u2.isp4022.p1.req_q_out), |
| 153 | + readw(&ha->reg->u2.isp4022.p1.req_q_out)); |
| 154 | + writel(PORT_CTRL_STAT_PAGE & set_rmask(CSR_SCSI_PAGE_SELECT), |
| 155 | + &ha->reg->ctrl_status); |
| 156 | + } |
| 157 | +} |
| 158 | + |
| 159 | +void qla4xxx_dump_mbox_registers(struct scsi_qla_host *ha) |
| 160 | +{ |
| 161 | + unsigned long flags = 0; |
| 162 | + int i = 0; |
| 163 | + spin_lock_irqsave(&ha->hardware_lock, flags); |
| 164 | + for (i = 1; i < MBOX_REG_COUNT; i++) |
| 165 | + printk(KERN_INFO " Mailbox[%d] = %08x\n", i, |
| 166 | + readw(&ha->reg->mailbox[i])); |
| 167 | + spin_unlock_irqrestore(&ha->hardware_lock, flags); |
| 168 | +} |
| 169 | + |
| 170 | +void qla4xxx_dump_registers(struct scsi_qla_host *ha) |
| 171 | +{ |
| 172 | + unsigned long flags = 0; |
| 173 | + spin_lock_irqsave(&ha->hardware_lock, flags); |
| 174 | + __dump_registers(ha); |
| 175 | + spin_unlock_irqrestore(&ha->hardware_lock, flags); |
| 176 | +} |
| 177 | + |
| 178 | +void qla4xxx_dump_buffer(void *b, uint32_t size) |
| 179 | +{ |
| 180 | + uint32_t cnt; |
| 181 | + uint8_t *c = b; |
| 182 | + |
| 183 | + printk(" 0 1 2 3 4 5 6 7 8 9 Ah Bh Ch Dh Eh " |
| 184 | + "Fh\n"); |
| 185 | + printk("------------------------------------------------------------" |
| 186 | + "--\n"); |
| 187 | + for (cnt = 0; cnt < size; cnt++, c++) { |
| 188 | + printk(KERN_DEBUG "%02x", *c); |
| 189 | + if (!(cnt % 16)) |
| 190 | + printk(KERN_DEBUG "\n"); |
| 191 | + |
| 192 | + else |
| 193 | + printk(KERN_DEBUG " "); |
| 194 | + } |
| 195 | + if (cnt % 16) |
| 196 | + printk(KERN_DEBUG "\n"); |
| 197 | +} |
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