@@ -282,8 +282,8 @@ static int hclge_tm_pg_to_pri_map_cfg(struct hclge_dev *hdev,
282282 return hclge_cmd_send (& hdev -> hw , & desc , 1 );
283283}
284284
285- static int hclge_tm_qs_to_pri_map_cfg (struct hclge_dev * hdev ,
286- u16 qs_id , u8 pri )
285+ static int hclge_tm_qs_to_pri_map_cfg (struct hclge_dev * hdev , u16 qs_id , u8 pri ,
286+ bool link_vld )
287287{
288288 struct hclge_qs_to_pri_link_cmd * map ;
289289 struct hclge_desc desc ;
@@ -294,7 +294,7 @@ static int hclge_tm_qs_to_pri_map_cfg(struct hclge_dev *hdev,
294294
295295 map -> qs_id = cpu_to_le16 (qs_id );
296296 map -> priority = pri ;
297- map -> link_vld = HCLGE_TM_QS_PRI_LINK_VLD_MSK ;
297+ map -> link_vld = link_vld ? HCLGE_TM_QS_PRI_LINK_VLD_MSK : 0 ;
298298
299299 return hclge_cmd_send (& hdev -> hw , & desc , 1 );
300300}
@@ -420,7 +420,7 @@ static int hclge_tm_pg_shapping_cfg(struct hclge_dev *hdev,
420420 return hclge_cmd_send (& hdev -> hw , & desc , 1 );
421421}
422422
423- static int hclge_tm_port_shaper_cfg (struct hclge_dev * hdev )
423+ int hclge_tm_port_shaper_cfg (struct hclge_dev * hdev )
424424{
425425 struct hclge_port_shapping_cmd * shap_cfg_cmd ;
426426 struct hclge_shaper_ir_para ir_para ;
@@ -642,11 +642,13 @@ static void hclge_tm_update_kinfo_rss_size(struct hclge_vport *vport)
642642 * one tc for VF for simplicity. VF's vport_id is non zero.
643643 */
644644 if (vport -> vport_id ) {
645+ kinfo -> tc_info .max_tc = 1 ;
645646 kinfo -> tc_info .num_tc = 1 ;
646647 vport -> qs_offset = HNAE3_MAX_TC +
647648 vport -> vport_id - HCLGE_VF_VPORT_START_NUM ;
648649 vport_max_rss_size = hdev -> vf_rss_size_max ;
649650 } else {
651+ kinfo -> tc_info .max_tc = hdev -> tc_max ;
650652 kinfo -> tc_info .num_tc =
651653 min_t (u16 , vport -> alloc_tqps , hdev -> tm_info .num_tc );
652654 vport -> qs_offset = 0 ;
@@ -679,7 +681,9 @@ static void hclge_tm_vport_tc_info_update(struct hclge_vport *vport)
679681 kinfo -> num_tqps = hclge_vport_get_tqp_num (vport );
680682 vport -> dwrr = 100 ; /* 100 percent as init */
681683 vport -> bw_limit = hdev -> tm_info .pg_info [0 ].bw_limit ;
682- hdev -> rss_cfg .rss_size = kinfo -> rss_size ;
684+
685+ if (vport -> vport_id == PF_VPORT_ID )
686+ hdev -> rss_cfg .rss_size = kinfo -> rss_size ;
683687
684688 /* when enable mqprio, the tc_info has been updated. */
685689 if (kinfo -> tc_info .mqprio_active )
@@ -714,14 +718,22 @@ static void hclge_tm_vport_info_update(struct hclge_dev *hdev)
714718
715719static void hclge_tm_tc_info_init (struct hclge_dev * hdev )
716720{
717- u8 i ;
721+ u8 i , tc_sch_mode ;
722+ u32 bw_limit ;
723+
724+ for (i = 0 ; i < hdev -> tc_max ; i ++ ) {
725+ if (i < hdev -> tm_info .num_tc ) {
726+ tc_sch_mode = HCLGE_SCH_MODE_DWRR ;
727+ bw_limit = hdev -> tm_info .pg_info [0 ].bw_limit ;
728+ } else {
729+ tc_sch_mode = HCLGE_SCH_MODE_SP ;
730+ bw_limit = 0 ;
731+ }
718732
719- for (i = 0 ; i < hdev -> tm_info .num_tc ; i ++ ) {
720733 hdev -> tm_info .tc_info [i ].tc_id = i ;
721- hdev -> tm_info .tc_info [i ].tc_sch_mode = HCLGE_SCH_MODE_DWRR ;
734+ hdev -> tm_info .tc_info [i ].tc_sch_mode = tc_sch_mode ;
722735 hdev -> tm_info .tc_info [i ].pgid = 0 ;
723- hdev -> tm_info .tc_info [i ].bw_limit =
724- hdev -> tm_info .pg_info [0 ].bw_limit ;
736+ hdev -> tm_info .tc_info [i ].bw_limit = bw_limit ;
725737 }
726738
727739 for (i = 0 ; i < HNAE3_MAX_USER_PRIO ; i ++ )
@@ -926,10 +938,13 @@ static int hclge_tm_pri_q_qs_cfg_tc_base(struct hclge_dev *hdev)
926938 for (k = 0 ; k < hdev -> num_alloc_vport ; k ++ ) {
927939 struct hnae3_knic_private_info * kinfo = & vport [k ].nic .kinfo ;
928940
929- for (i = 0 ; i < kinfo -> tc_info .num_tc ; i ++ ) {
941+ for (i = 0 ; i < kinfo -> tc_info .max_tc ; i ++ ) {
942+ u8 pri = i < kinfo -> tc_info .num_tc ? i : 0 ;
943+ bool link_vld = i < kinfo -> tc_info .num_tc ;
944+
930945 ret = hclge_tm_qs_to_pri_map_cfg (hdev ,
931946 vport [k ].qs_offset + i ,
932- i );
947+ pri , link_vld );
933948 if (ret )
934949 return ret ;
935950 }
@@ -949,7 +964,7 @@ static int hclge_tm_pri_q_qs_cfg_vnet_base(struct hclge_dev *hdev)
949964 for (i = 0 ; i < HNAE3_MAX_TC ; i ++ ) {
950965 ret = hclge_tm_qs_to_pri_map_cfg (hdev ,
951966 vport [k ].qs_offset + i ,
952- k );
967+ k , true );
953968 if (ret )
954969 return ret ;
955970 }
@@ -989,33 +1004,39 @@ static int hclge_tm_pri_tc_base_shaper_cfg(struct hclge_dev *hdev)
9891004{
9901005 u32 max_tm_rate = hdev -> ae_dev -> dev_specs .max_tm_rate ;
9911006 struct hclge_shaper_ir_para ir_para ;
992- u32 shaper_para ;
1007+ u32 shaper_para_c , shaper_para_p ;
9931008 int ret ;
9941009 u32 i ;
9951010
996- for (i = 0 ; i < hdev -> tm_info . num_tc ; i ++ ) {
1011+ for (i = 0 ; i < hdev -> tc_max ; i ++ ) {
9971012 u32 rate = hdev -> tm_info .tc_info [i ].bw_limit ;
9981013
999- ret = hclge_shaper_para_calc (rate , HCLGE_SHAPER_LVL_PRI ,
1000- & ir_para , max_tm_rate );
1001- if (ret )
1002- return ret ;
1014+ if (rate ) {
1015+ ret = hclge_shaper_para_calc (rate , HCLGE_SHAPER_LVL_PRI ,
1016+ & ir_para , max_tm_rate );
1017+ if (ret )
1018+ return ret ;
1019+
1020+ shaper_para_c = hclge_tm_get_shapping_para (0 , 0 , 0 ,
1021+ HCLGE_SHAPER_BS_U_DEF ,
1022+ HCLGE_SHAPER_BS_S_DEF );
1023+ shaper_para_p = hclge_tm_get_shapping_para (ir_para .ir_b ,
1024+ ir_para .ir_u ,
1025+ ir_para .ir_s ,
1026+ HCLGE_SHAPER_BS_U_DEF ,
1027+ HCLGE_SHAPER_BS_S_DEF );
1028+ } else {
1029+ shaper_para_c = 0 ;
1030+ shaper_para_p = 0 ;
1031+ }
10031032
1004- shaper_para = hclge_tm_get_shapping_para (0 , 0 , 0 ,
1005- HCLGE_SHAPER_BS_U_DEF ,
1006- HCLGE_SHAPER_BS_S_DEF );
10071033 ret = hclge_tm_pri_shapping_cfg (hdev , HCLGE_TM_SHAP_C_BUCKET , i ,
1008- shaper_para , rate );
1034+ shaper_para_c , rate );
10091035 if (ret )
10101036 return ret ;
10111037
1012- shaper_para = hclge_tm_get_shapping_para (ir_para .ir_b ,
1013- ir_para .ir_u ,
1014- ir_para .ir_s ,
1015- HCLGE_SHAPER_BS_U_DEF ,
1016- HCLGE_SHAPER_BS_S_DEF );
10171038 ret = hclge_tm_pri_shapping_cfg (hdev , HCLGE_TM_SHAP_P_BUCKET , i ,
1018- shaper_para , rate );
1039+ shaper_para_p , rate );
10191040 if (ret )
10201041 return ret ;
10211042 }
@@ -1125,7 +1146,7 @@ static int hclge_tm_pri_tc_base_dwrr_cfg(struct hclge_dev *hdev)
11251146 int ret ;
11261147 u32 i , k ;
11271148
1128- for (i = 0 ; i < hdev -> tm_info . num_tc ; i ++ ) {
1149+ for (i = 0 ; i < hdev -> tc_max ; i ++ ) {
11291150 pg_info =
11301151 & hdev -> tm_info .pg_info [hdev -> tm_info .tc_info [i ].pgid ];
11311152 dwrr = pg_info -> tc_dwrr [i ];
@@ -1135,9 +1156,15 @@ static int hclge_tm_pri_tc_base_dwrr_cfg(struct hclge_dev *hdev)
11351156 return ret ;
11361157
11371158 for (k = 0 ; k < hdev -> num_alloc_vport ; k ++ ) {
1159+ struct hnae3_knic_private_info * kinfo = & vport [k ].nic .kinfo ;
1160+
1161+ if (i >= kinfo -> tc_info .max_tc )
1162+ continue ;
1163+
1164+ dwrr = i < kinfo -> tc_info .num_tc ? vport [k ].dwrr : 0 ;
11381165 ret = hclge_tm_qs_weight_cfg (
11391166 hdev , vport [k ].qs_offset + i ,
1140- vport [ k ]. dwrr );
1167+ dwrr );
11411168 if (ret )
11421169 return ret ;
11431170 }
@@ -1303,16 +1330,24 @@ static int hclge_tm_schd_mode_tc_base_cfg(struct hclge_dev *hdev, u8 pri_id)
13031330{
13041331 struct hclge_vport * vport = hdev -> vport ;
13051332 int ret ;
1333+ u8 mode ;
13061334 u16 i ;
13071335
13081336 ret = hclge_tm_pri_schd_mode_cfg (hdev , pri_id );
13091337 if (ret )
13101338 return ret ;
13111339
13121340 for (i = 0 ; i < hdev -> num_alloc_vport ; i ++ ) {
1341+ struct hnae3_knic_private_info * kinfo = & vport [i ].nic .kinfo ;
1342+
1343+ if (pri_id >= kinfo -> tc_info .max_tc )
1344+ continue ;
1345+
1346+ mode = pri_id < kinfo -> tc_info .num_tc ? HCLGE_SCH_MODE_DWRR :
1347+ HCLGE_SCH_MODE_SP ;
13131348 ret = hclge_tm_qs_schd_mode_cfg (hdev ,
13141349 vport [i ].qs_offset + pri_id ,
1315- HCLGE_SCH_MODE_DWRR );
1350+ mode );
13161351 if (ret )
13171352 return ret ;
13181353 }
@@ -1353,7 +1388,7 @@ static int hclge_tm_lvl34_schd_mode_cfg(struct hclge_dev *hdev)
13531388 u8 i ;
13541389
13551390 if (hdev -> tx_sch_mode == HCLGE_FLAG_TC_BASE_SCH_MODE ) {
1356- for (i = 0 ; i < hdev -> tm_info . num_tc ; i ++ ) {
1391+ for (i = 0 ; i < hdev -> tc_max ; i ++ ) {
13571392 ret = hclge_tm_schd_mode_tc_base_cfg (hdev , i );
13581393 if (ret )
13591394 return ret ;
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