Skip to content

Commit a02fb5c

Browse files
author
Vince Bridgers
committed
FogBugz #187411: Add TSE MSGDMA and SGMDA Hybrid Driver
This commit adds the TSE MSGDMA and SGDMA hybrid driver. The driver checks the device tree bindings compatibility string to determine what mode the driver is operating in, and probes the device tree for required resources accordingly. SGDMA will be deprecated very soon by Altera, but is still supported in this driver for customers that still use SGDMA. The driver serves as a good example of how to use two different types of soft DMA IP. The driver was tested on ARM and NIOS systems, and issues specific to those systems are handled by the driver such as misaligned exceptions on the NIOS processor. V3: - Remove maintainer changes - Correct git commit log line lengths V2: - Update per Crucible review 596 - Update bindings descriptions altera_tse.txt per review comments - Changed altera_tse_driver to alteratse in Makefile and Kconfig - Added entry in the Maintainers file - changed altera_sgdmahw.h to use BIT macro instead of like (1<<0) - corrected copyrights per review comments - moved cacheflush.h to bottom of header inclusions in altera_tse.c - use apis to extract lower and upper 32 bits of dma addresss - remove barriers since dma apis ensure memory consistency - add max-frame-size property - change platform id from AVALON to "platform" - use of function of_get_phy_mode instead of custom function - remove use of netif_carrier_off, not needed in driver - move probing of phy from open to the probe function Signed-off-by: Vince Bridgers <[email protected]>
1 parent 978d16f commit a02fb5c

File tree

17 files changed

+3346
-1903
lines changed

17 files changed

+3346
-1903
lines changed

‎Documentation/devicetree/bindings/net/altera_tse.txt‎

Lines changed: 113 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,113 @@
1+
* Altera Triple-Speed Ethernet MAC driver (TSE)
2+
3+
Required properties:
4+
- compatible: Should be "altr,tse-1.0" for legacy SGDMA based TSE, and should
5+
be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE.
6+
ALTR is supported for legacy device trees, but is deprecated.
7+
altr should be used when not using a legacy configuration.
8+
- reg: Address and length of the register set for the device. It contains
9+
the information of registers in the same order as described by reg-names
10+
- reg-names: Should contain the reg names
11+
"control_port": MAC configuration space region
12+
"tx_csr": xDMA Tx dispatcher control and status space region
13+
"tx_desc": MSGDMA Tx dispatcher descriptor space region
14+
"rx_csr" : xDMA Rx dispatcher control and status space region
15+
"rx_desc": MSGDMA Rx dispatcher descriptor space region
16+
"rx_resp": MSGDMA Rx dispatcher response space region
17+
"s1": SGDMA descriptor memory
18+
- interrupts: Should contain the TSE interrupts and it's mode.
19+
- interrupt-names: Should contain the interrupt names
20+
"rx_irq": xDMA Rx dispatcher interrupt
21+
"tx_irq": xDMA Tx dispatcher interrupt
22+
- altr,rx-fifo-depth: MAC receive FIFO buffer depth (in 32-bit words)
23+
- altr,tx-fifo-depth: MAC transmit FIFO buffer depth (in 32-bit words)
24+
- phy-mode: String, operation mode of the PHY interface. Supported values are:
25+
"mii", "gmii", "rgmii-id", "rgmii", "sgmii"
26+
- phy-handle: A phandle pointing to device tree node with
27+
device_type = "ethernet-phy". Using a phandle allows
28+
support for both phys connected to TSE's local mdio or
29+
some other phy.
30+
- altr,phy-addr: PHY address to use with a phy connected to TSE's local mdio.
31+
One should have either a phy-handle property or altr,phy-addr
32+
when using a phy with the TSE.
33+
34+
-mdio device tree subnode: When the TSE has a phy connected to its local
35+
mdio, there must be device tree subnode with the following
36+
required properties:
37+
38+
- compatible: Must be "altr,tse-mdio".
39+
- #address-cells: Must be <1>.
40+
- #size-cells: Must be <0>.
41+
42+
For each phy on the mdio bus, there must be a node with the following
43+
fields:
44+
45+
- reg: phy id used to communicate to phy.
46+
- device_type: Must be "ethernet-phy".
47+
48+
Optional properties:
49+
- local-mac-address: 6 bytes, ethernet mac address to use
50+
51+
Example:
52+
53+
tse_sub_0_eth_tse_0: ethernet@0x100000000 {
54+
compatible = "altr,tse-msgdma-1.0";
55+
reg = < 0x00000001 0x00000000 0x00000400
56+
0x00000001 0x00000460 0x00000020
57+
0x00000001 0x00000480 0x00000020
58+
0x00000001 0x000004A0 0x00000008
59+
0x00000001 0x00000400 0x00000020
60+
0x00000001 0x00000420 0x00000020 >;
61+
reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";
62+
interrupt-parent = < &hps_0_arm_gic_0 >;
63+
interrupts = < 0 41 4 0 40 4 >;
64+
interrupt-names = "rx_irq", "tx_irq";
65+
altr,rx-fifo-depth = < 2048 >;
66+
altr,tx-fifo-depth = < 2048 >;
67+
address-bits = < 48 >;
68+
max-frame-size = < 1500 >;
69+
local-mac-address = [ 00 00 00 00 00 00 ];
70+
phy-mode = "gmii";
71+
altr,enable-sup-addr = < 0 >;
72+
altr,enable-hash = < 1 >;
73+
phy-handle = < &phy0 >;
74+
mdio@0 {
75+
compatible = "altr,tse-mdio";
76+
#address-cells = <1>;
77+
#size-cells = <0>;
78+
phy0: ethernet-phy@0 {
79+
reg = <0x0>;
80+
device_type = "ethernet-phy";
81+
};
82+
83+
phy1: ethernet-phy@1 {
84+
reg = <0x1>;
85+
device_type = "ethernet-phy";
86+
};
87+
88+
};
89+
};
90+
91+
tse_sub_1_eth_tse_0: ethernet@0x100001000 {
92+
compatible = "altr,tse-msgdma-1.0";
93+
reg = < 0x00000001 0x00001000 0x00000400
94+
0x00000001 0x00001460 0x00000020
95+
0x00000001 0x00001480 0x00000020
96+
0x00000001 0x000014A0 0x00000008
97+
0x00000001 0x00001400 0x00000020
98+
0x00000001 0x00001420 0x00000020 >;
99+
reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";
100+
interrupt-parent = < &hps_0_arm_gic_0 >;
101+
interrupts = < 0 43 4 0 42 4 >;
102+
interrupt-names = "rx_irq", "tx_irq";
103+
altr,rx-fifo-depth = < 2048 >;
104+
altr,tx-fifo-depth = < 2048 >;
105+
address-bits = < 48 >;
106+
max-frame-size = < 1500 >;
107+
local-mac-address = [ 00 00 00 00 00 00 ];
108+
phy-mode = "gmii";
109+
altr,phy-addr = < 1 >;
110+
altr,enable-sup-addr = < 0 >;
111+
altr,enable-hash = < 1 >;
112+
phy-handle = < &phy1 >;
113+
};

‎Documentation/networking/altera_tse.txt‎

Lines changed: 118 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,118 @@
1+
Altera Triple-Speed Ethernet MAC driver
2+
3+
Copyright (C) 2008-2014 Altera Corporation
4+
5+
This is the driver for the Altera Triple-Speed Ethernet (TSE) controllers
6+
using the SGDMA and MSGDMA components. The driver uses the platform bus to
7+
obtain component resources. The designs used to test this driver were built for
8+
a Cyclone(R) V SOC FPGA board, a Cyclone(R) V FPGA board, and tested with ARM
9+
and NIOS processor hosts seperately. The anticipated use cases are simple
10+
communications between an embedded system and an external peer for status and
11+
simple configuration of the embedded system.
12+
13+
For more information visit www.altera.com and www.rocketboards.org. Support
14+
forums for the driver may be found on www.rocketboards.org, and a design used
15+
to test this driver may be found there as well. Support is also available from
16+
the maintainer of this driver, found in MAINTAINERS.
17+
18+
The Triple-Speed Ethernet, SGDMA, and MSGDMA components are all soft IP
19+
components that can be assembled and built into an FPGA using the Altera
20+
Quartus toolchain. Quartus 13.1 and 14.0 were used to build the design that
21+
this driver was tested against.
22+
23+
The driver probe function examines the device tree and determines if the
24+
Triple-Speed Ethernet instance is using an SGDMA or MSGDMA component. The
25+
probe function then installs the appropriate set of DMA routines to
26+
initialize, setup transmits, receives, and interrupt handling primitives for
27+
the respective configurations.
28+
29+
The SGDMA component is to be deprecated in the near future (over the next 1-2
30+
years as of this writing in early 2014) in favor of the MSGDMA component.
31+
SGDMA support is included for existing designs and reference in case a
32+
developer wishes to support their own soft DMA logic and driver support. Any
33+
new designs should not use the SGDMA.
34+
35+
The SGDMA supports only a single transmit or receive operation at a time, and
36+
therefore will not perform as well compared to the MSGDMA soft IP. Please
37+
visit www.altera.com for known, documented SGDMA errata.
38+
39+
Scatter-gather DMA is not supported by the SGDMA or MSGDMA at this time.
40+
Scatter-gather DMA will be added to a future maintenance update to this
41+
driver.
42+
43+
Jumbo frames are not supported at this time.
44+
45+
The driver limits PHY operations to 10/100Mbps, and has not yet been fully
46+
tested for 1Gbps. This support will be added in a future maintenance update.
47+
48+
1) Kernel Configuration
49+
The kernel configuration option is ALTERA_TSE:
50+
Device Drivers ---> Network device support ---> Ethernet driver support --->
51+
Altera Triple-Speed Ethernet MAC support (ALTERA_TSE)
52+
53+
2) Driver parameters list:
54+
debug: message level (0: no output, 16: all);
55+
dma_rx_num: Number of descriptors in the RX list (default is 64);
56+
dma_tx_num: Number of descriptors in the TX list (default is 64).
57+
58+
3) Command line options
59+
Driver parameters can be also passed in command line by using:
60+
altera_tse=dma_rx_num:128,dma_tx_num:512
61+
62+
4) Driver information and notes
63+
64+
4.1) Transmit process
65+
When the driver's transmit routine is called by the kernel, it sets up a
66+
transmit descriptor by calling the underlying DMA transmit routine (SGDMA or
67+
MSGDMA), and initites a transmit operation. Once the transmit is complete, an
68+
interrupt is driven by the transmit DMA logic. The driver handles the transmit
69+
completion in the context of the interrupt handling chain by recycling
70+
resource required to send and track the requested transmit operation.
71+
72+
4.2) Receive process
73+
The driver will post receive buffers to the receive DMA logic during driver
74+
intialization. Receive buffers may or may not be queued depending upon the
75+
underlying DMA logic (MSGDMA is able queue receive buffers, SGDMA is not able
76+
to queue receive buffers to the SGDMA receive logic). When a packet is
77+
received, the DMA logic generates an interrupt. The driver handles a receive
78+
interrupt by obtaining the DMA receive logic status, reaping receive
79+
completions until no more receive completions are available.
80+
81+
4.3) Interrupt Mitigation
82+
The driver is able to mitigate the number of its DMA interrupts
83+
using NAPI for receive operations. Interrupt mitigation is not yet supported
84+
for transmit operations, but will be added in a future maintenance release.
85+
86+
4.4) Ethtool support
87+
Ethtool is supported. Driver statistics and internal errors can be taken using:
88+
ethtool -S ethX command. It is possible to dump registers etc.
89+
90+
4.5) PHY Support
91+
The driver is compatible with PAL to work with PHY and GPHY devices.
92+
93+
4.7) List of source files:
94+
o Kconfig
95+
o Makefile
96+
o altera_tse_main.c: main network device driver
97+
o altera_tse_ethtool.c: ethtool support
98+
o altera_tse.h: private driver structure and common definitions
99+
o altera_msgdma.h: MSGDMA implementation function definitions
100+
o altera_sgdma.h: SGDMA implementation function definitions
101+
o altera_msgdma.c: MSGDMA implementation
102+
o altera_sgdma.c: SGDMA implementation
103+
o altera_sgdmahw.h: SGDMA register and descriptor definitions
104+
o altera_msgdmahw.h: MSGDMA register and descriptor definitions
105+
o altera_utils.c: Driver utility functions
106+
o altera_utils.h: Driver utility function definitions
107+
108+
5) Debug Information
109+
110+
The driver exports debug information such as internal statistics,
111+
debug information, MAC and DMA registers etc.
112+
113+
A user may use the ethtool support to get statistics:
114+
e.g. using: ethtool -S ethX (that shows the statistics counters)
115+
or sees the MAC registers: e.g. using: ethtool -d ethX
116+
117+
The developer can also use the "debug" module parameter to get
118+
further debug information.

‎drivers/net/ethernet/Makefile‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@ obj-$(CONFIG_NET_VENDOR_8390) += 8390/
77
obj-$(CONFIG_NET_VENDOR_ADAPTEC) += adaptec/
88
obj-$(CONFIG_GRETH) += aeroflex/
99
obj-$(CONFIG_NET_VENDOR_ALTEON) += alteon/
10-
obj-$(CONFIG_NET_VENDOR_ALTERA) += altera/
10+
obj-$(CONFIG_ALTERA_TSE) += altera/
1111
obj-$(CONFIG_NET_VENDOR_AMD) += amd/
1212
obj-$(CONFIG_NET_VENDOR_APPLE) += apple/
1313
obj-$(CONFIG_NET_VENDOR_ATHEROS) += atheros/

‎drivers/net/ethernet/altera/Kconfig‎

Lines changed: 5 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1,27 +1,8 @@
1-
#
2-
# Altera device configuration
3-
#
4-
5-
config NET_VENDOR_ALTERA
6-
bool "Altera devices"
7-
---help---
8-
If you have a network (Ethernet) card belonging to this class, say Y.
9-
Make sure you know the name of your card. Read the Ethernet-HOWTO,
10-
available from <http://www.tldp.org/docs.html#howto>.
11-
12-
If unsure, say Y.
13-
14-
Note that the answer to this question doesn't directly affect the
15-
kernel: saying N will just cause the configurator to skip all
16-
the remaining Blackfin card questions. If you say Y, you will be
17-
asked for your specific card in the following questions.
18-
19-
if NET_VENDOR_ALTERA
20-
21-
config ALT_TSE
1+
config ALTERA_TSE
222
tristate "Altera Triple-Speed Ethernet MAC support"
233
select PHYLIB
24-
help
25-
This drivers supports the Altera Triple-Speed (TSE) Ethernet MAC.
4+
---help---
5+
This driver supports the Altera Triple-Speed (TSE) Ethernet MAC.
266

27-
endif # NET_ALTERA
7+
To compile this driver as a module, choose M here. The module
8+
will be called alteratse.

‎drivers/net/ethernet/altera/Makefile‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,5 +2,6 @@
22
# Makefile for the Altera device drivers.
33
#
44

5-
obj-$(CONFIG_ALT_TSE) += altera_tse_driver.o
6-
altera_tse_driver-objs := altera_tse.o altera_tse_ethtool.o
5+
obj-$(CONFIG_ALTERA_TSE) += altera_tse.o
6+
altera_tse-objs := altera_tse_main.o altera_tse_ethtool.o \
7+
altera_msgdma.o altera_sgdma.o altera_utils.o

0 commit comments

Comments
 (0)