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1 parent 3e5b1a3 commit 96a7100Copy full SHA for 96a7100
arch/arm64/net/bpf_jit_comp.c
@@ -390,18 +390,6 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
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case BPF_ALU64 | BPF_DIV | BPF_X:
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case BPF_ALU | BPF_MOD | BPF_X:
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case BPF_ALU64 | BPF_MOD | BPF_X:
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- {
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- const u8 r0 = bpf2a64[BPF_REG_0];
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-
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- /* if (src == 0) return 0 */
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- jmp_offset = 3; /* skip ahead to else path */
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- check_imm19(jmp_offset);
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- emit(A64_CBNZ(is64, src, jmp_offset), ctx);
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- emit(A64_MOVZ(1, r0, 0, 0), ctx);
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- jmp_offset = epilogue_offset(ctx);
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- check_imm26(jmp_offset);
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- emit(A64_B(jmp_offset), ctx);
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- /* else */
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switch (BPF_OP(code)) {
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case BPF_DIV:
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emit(A64_UDIV(is64, dst, dst, src), ctx);
@@ -413,7 +401,6 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx)
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break;
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}
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- }
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case BPF_ALU | BPF_LSH | BPF_X:
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case BPF_ALU64 | BPF_LSH | BPF_X:
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emit(A64_LSLV(is64, dst, dst, src), ctx);
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