@@ -2840,7 +2840,7 @@ static int __devinit pci_probe(struct pci_dev *dev,
28402840 const struct pci_device_id * ent )
28412841{
28422842 struct fw_ohci * ohci ;
2843- u32 bus_options , max_receive , link_speed , version , link_enh ;
2843+ u32 bus_options , max_receive , link_speed , version ;
28442844 u64 guid ;
28452845 int i , err , n_ir , n_it ;
28462846 size_t size ;
@@ -2894,23 +2894,6 @@ static int __devinit pci_probe(struct pci_dev *dev,
28942894 if (param_quirks )
28952895 ohci -> quirks = param_quirks ;
28962896
2897- /* TI OHCI-Lynx and compatible: set recommended configuration bits. */
2898- if (dev -> vendor == PCI_VENDOR_ID_TI ) {
2899- pci_read_config_dword (dev , PCI_CFG_TI_LinkEnh , & link_enh );
2900-
2901- /* adjust latency of ATx FIFO: use 1.7 KB threshold */
2902- link_enh &= ~TI_LinkEnh_atx_thresh_mask ;
2903- link_enh |= TI_LinkEnh_atx_thresh_1_7K ;
2904-
2905- /* use priority arbitration for asynchronous responses */
2906- link_enh |= TI_LinkEnh_enab_unfair ;
2907-
2908- /* required for aPhyEnhanceEnable to work */
2909- link_enh |= TI_LinkEnh_enab_accel ;
2910-
2911- pci_write_config_dword (dev , PCI_CFG_TI_LinkEnh , link_enh );
2912- }
2913-
29142897 ar_context_init (& ohci -> ar_request_ctx , ohci ,
29152898 OHCI1394_AsReqRcvContextControlSet );
29162899
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