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1 parent f2ad937 commit 7db20bcCopy full SHA for 7db20bc
drivers/clk/zynqmp/divider.c
@@ -35,6 +35,7 @@
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* @is_frac: The divider is a fractional divider
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* @clk_id: Id of clock
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* @div_type: divisor type (TYPE_DIV1 or TYPE_DIV2)
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+ * @max_div: maximum supported divisor (fetched from firmware)
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*/
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struct zynqmp_clk_divider {
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struct clk_hw hw;
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