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torvaldstorvalds
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Merge tag 'gpio-fixes-for-v5.19-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux
Pull gpio fixes from Bartosz Golaszewski: "A set of fixes. Most address the new warning we emit at build time when irq chips are not immutable with some additional tweaks to gpio-crystalcove from Andy and a small tweak to gpio-dwapd. - make irq_chip structs immutable in several Diolan and intel drivers to get rid of the new warning we emit when fiddling with irq chips - don't print error messages on probe deferral in gpio-dwapb" * tag 'gpio-fixes-for-v5.19-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: gpio: dwapb: Don't print error on -EPROBE_DEFER gpio: dln2: make irq_chip immutable gpio: sch: make irq_chip immutable gpio: merrifield: make irq_chip immutable gpio: wcove: make irq_chip immutable gpio: crystalcove: Join function declarations and long lines gpio: crystalcove: Use specific type and API for IRQ number gpio: crystalcove: make irq_chip immutable
2 parents cecb354 + 77006f6 commit 7a68065

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6 files changed

+99
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‎drivers/gpio/gpio-crystalcove.c‎

Lines changed: 37 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@
1515
#include <linux/platform_device.h>
1616
#include <linux/regmap.h>
1717
#include <linux/seq_file.h>
18+
#include <linux/types.h>
1819

1920
#define CRYSTALCOVE_GPIO_NUM 16
2021
#define CRYSTALCOVE_VGPIO_NUM 95
@@ -110,8 +111,7 @@ static inline int to_reg(int gpio, enum ctrl_register reg_type)
110111
return reg + gpio % 8;
111112
}
112113

113-
static void crystalcove_update_irq_mask(struct crystalcove_gpio *cg,
114-
int gpio)
114+
static void crystalcove_update_irq_mask(struct crystalcove_gpio *cg, int gpio)
115115
{
116116
u8 mirqs0 = gpio < 8 ? MGPIO0IRQS0 : MGPIO1IRQS0;
117117
int mask = BIT(gpio % 8);
@@ -140,8 +140,7 @@ static int crystalcove_gpio_dir_in(struct gpio_chip *chip, unsigned int gpio)
140140
return regmap_write(cg->regmap, reg, CTLO_INPUT_SET);
141141
}
142142

143-
static int crystalcove_gpio_dir_out(struct gpio_chip *chip, unsigned int gpio,
144-
int value)
143+
static int crystalcove_gpio_dir_out(struct gpio_chip *chip, unsigned int gpio, int value)
145144
{
146145
struct crystalcove_gpio *cg = gpiochip_get_data(chip);
147146
int reg = to_reg(gpio, CTRL_OUT);
@@ -168,8 +167,7 @@ static int crystalcove_gpio_get(struct gpio_chip *chip, unsigned int gpio)
168167
return val & 0x1;
169168
}
170169

171-
static void crystalcove_gpio_set(struct gpio_chip *chip,
172-
unsigned int gpio, int value)
170+
static void crystalcove_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value)
173171
{
174172
struct crystalcove_gpio *cg = gpiochip_get_data(chip);
175173
int reg = to_reg(gpio, CTRL_OUT);
@@ -185,10 +183,10 @@ static void crystalcove_gpio_set(struct gpio_chip *chip,
185183

186184
static int crystalcove_irq_type(struct irq_data *data, unsigned int type)
187185
{
188-
struct crystalcove_gpio *cg =
189-
gpiochip_get_data(irq_data_get_irq_chip_data(data));
186+
struct crystalcove_gpio *cg = gpiochip_get_data(irq_data_get_irq_chip_data(data));
187+
irq_hw_number_t hwirq = irqd_to_hwirq(data);
190188

191-
if (data->hwirq >= CRYSTALCOVE_GPIO_NUM)
189+
if (hwirq >= CRYSTALCOVE_GPIO_NUM)
192190
return 0;
193191

194192
switch (type) {
@@ -215,57 +213,64 @@ static int crystalcove_irq_type(struct irq_data *data, unsigned int type)
215213

216214
static void crystalcove_bus_lock(struct irq_data *data)
217215
{
218-
struct crystalcove_gpio *cg =
219-
gpiochip_get_data(irq_data_get_irq_chip_data(data));
216+
struct crystalcove_gpio *cg = gpiochip_get_data(irq_data_get_irq_chip_data(data));
220217

221218
mutex_lock(&cg->buslock);
222219
}
223220

224221
static void crystalcove_bus_sync_unlock(struct irq_data *data)
225222
{
226-
struct crystalcove_gpio *cg =
227-
gpiochip_get_data(irq_data_get_irq_chip_data(data));
228-
int gpio = data->hwirq;
223+
struct crystalcove_gpio *cg = gpiochip_get_data(irq_data_get_irq_chip_data(data));
224+
irq_hw_number_t hwirq = irqd_to_hwirq(data);
229225

230226
if (cg->update & UPDATE_IRQ_TYPE)
231-
crystalcove_update_irq_ctrl(cg, gpio);
227+
crystalcove_update_irq_ctrl(cg, hwirq);
232228
if (cg->update & UPDATE_IRQ_MASK)
233-
crystalcove_update_irq_mask(cg, gpio);
229+
crystalcove_update_irq_mask(cg, hwirq);
234230
cg->update = 0;
235231

236232
mutex_unlock(&cg->buslock);
237233
}
238234

239235
static void crystalcove_irq_unmask(struct irq_data *data)
240236
{
241-
struct crystalcove_gpio *cg =
242-
gpiochip_get_data(irq_data_get_irq_chip_data(data));
237+
struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
238+
struct crystalcove_gpio *cg = gpiochip_get_data(gc);
239+
irq_hw_number_t hwirq = irqd_to_hwirq(data);
243240

244-
if (data->hwirq < CRYSTALCOVE_GPIO_NUM) {
245-
cg->set_irq_mask = false;
246-
cg->update |= UPDATE_IRQ_MASK;
247-
}
241+
if (hwirq >= CRYSTALCOVE_GPIO_NUM)
242+
return;
243+
244+
gpiochip_enable_irq(gc, hwirq);
245+
246+
cg->set_irq_mask = false;
247+
cg->update |= UPDATE_IRQ_MASK;
248248
}
249249

250250
static void crystalcove_irq_mask(struct irq_data *data)
251251
{
252-
struct crystalcove_gpio *cg =
253-
gpiochip_get_data(irq_data_get_irq_chip_data(data));
252+
struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
253+
struct crystalcove_gpio *cg = gpiochip_get_data(gc);
254+
irq_hw_number_t hwirq = irqd_to_hwirq(data);
254255

255-
if (data->hwirq < CRYSTALCOVE_GPIO_NUM) {
256-
cg->set_irq_mask = true;
257-
cg->update |= UPDATE_IRQ_MASK;
258-
}
256+
if (hwirq >= CRYSTALCOVE_GPIO_NUM)
257+
return;
258+
259+
cg->set_irq_mask = true;
260+
cg->update |= UPDATE_IRQ_MASK;
261+
262+
gpiochip_disable_irq(gc, hwirq);
259263
}
260264

261-
static struct irq_chip crystalcove_irqchip = {
265+
static const struct irq_chip crystalcove_irqchip = {
262266
.name = "Crystal Cove",
263267
.irq_mask = crystalcove_irq_mask,
264268
.irq_unmask = crystalcove_irq_unmask,
265269
.irq_set_type = crystalcove_irq_type,
266270
.irq_bus_lock = crystalcove_bus_lock,
267271
.irq_bus_sync_unlock = crystalcove_bus_sync_unlock,
268-
.flags = IRQCHIP_SKIP_SET_WAKE,
272+
.flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_IMMUTABLE,
273+
GPIOCHIP_IRQ_RESOURCE_HELPERS,
269274
};
270275

271276
static irqreturn_t crystalcove_gpio_irq_handler(int irq, void *data)
@@ -293,8 +298,7 @@ static irqreturn_t crystalcove_gpio_irq_handler(int irq, void *data)
293298
return IRQ_HANDLED;
294299
}
295300

296-
static void crystalcove_gpio_dbg_show(struct seq_file *s,
297-
struct gpio_chip *chip)
301+
static void crystalcove_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
298302
{
299303
struct crystalcove_gpio *cg = gpiochip_get_data(chip);
300304
int gpio, offset;
@@ -353,7 +357,7 @@ static int crystalcove_gpio_probe(struct platform_device *pdev)
353357
cg->regmap = pmic->regmap;
354358

355359
girq = &cg->chip.irq;
356-
girq->chip = &crystalcove_irqchip;
360+
gpio_irq_chip_set_chip(girq, &crystalcove_irqchip);
357361
/* This will let us handle the parent IRQ in the driver */
358362
girq->parent_handler = NULL;
359363
girq->num_parents = 0;

‎drivers/gpio/gpio-dln2.c‎

Lines changed: 14 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -46,7 +46,6 @@
4646
struct dln2_gpio {
4747
struct platform_device *pdev;
4848
struct gpio_chip gpio;
49-
struct irq_chip irqchip;
5049

5150
/*
5251
* Cache pin direction to save us one transfer, since the hardware has
@@ -306,6 +305,7 @@ static void dln2_irq_unmask(struct irq_data *irqd)
306305
struct dln2_gpio *dln2 = gpiochip_get_data(gc);
307306
int pin = irqd_to_hwirq(irqd);
308307

308+
gpiochip_enable_irq(gc, pin);
309309
set_bit(pin, dln2->unmasked_irqs);
310310
}
311311

@@ -316,6 +316,7 @@ static void dln2_irq_mask(struct irq_data *irqd)
316316
int pin = irqd_to_hwirq(irqd);
317317

318318
clear_bit(pin, dln2->unmasked_irqs);
319+
gpiochip_disable_irq(gc, pin);
319320
}
320321

321322
static int dln2_irq_set_type(struct irq_data *irqd, unsigned type)
@@ -384,6 +385,17 @@ static void dln2_irq_bus_unlock(struct irq_data *irqd)
384385
mutex_unlock(&dln2->irq_lock);
385386
}
386387

388+
static const struct irq_chip dln2_irqchip = {
389+
.name = "dln2-irq",
390+
.irq_mask = dln2_irq_mask,
391+
.irq_unmask = dln2_irq_unmask,
392+
.irq_set_type = dln2_irq_set_type,
393+
.irq_bus_lock = dln2_irq_bus_lock,
394+
.irq_bus_sync_unlock = dln2_irq_bus_unlock,
395+
.flags = IRQCHIP_IMMUTABLE,
396+
GPIOCHIP_IRQ_RESOURCE_HELPERS,
397+
};
398+
387399
static void dln2_gpio_event(struct platform_device *pdev, u16 echo,
388400
const void *data, int len)
389401
{
@@ -465,15 +477,8 @@ static int dln2_gpio_probe(struct platform_device *pdev)
465477
dln2->gpio.direction_output = dln2_gpio_direction_output;
466478
dln2->gpio.set_config = dln2_gpio_set_config;
467479

468-
dln2->irqchip.name = "dln2-irq",
469-
dln2->irqchip.irq_mask = dln2_irq_mask,
470-
dln2->irqchip.irq_unmask = dln2_irq_unmask,
471-
dln2->irqchip.irq_set_type = dln2_irq_set_type,
472-
dln2->irqchip.irq_bus_lock = dln2_irq_bus_lock,
473-
dln2->irqchip.irq_bus_sync_unlock = dln2_irq_bus_unlock,
474-
475480
girq = &dln2->gpio.irq;
476-
girq->chip = &dln2->irqchip;
481+
gpio_irq_chip_set_chip(girq, &dln2_irqchip);
477482
/* The event comes from the outside so no parent handler */
478483
girq->parent_handler = NULL;
479484
girq->num_parents = 0;

‎drivers/gpio/gpio-dwapb.c‎

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -662,10 +662,9 @@ static int dwapb_get_clks(struct dwapb_gpio *gpio)
662662
gpio->clks[1].id = "db";
663663
err = devm_clk_bulk_get_optional(gpio->dev, DWAPB_NR_CLOCKS,
664664
gpio->clks);
665-
if (err) {
666-
dev_err(gpio->dev, "Cannot get APB/Debounce clocks\n");
667-
return err;
668-
}
665+
if (err)
666+
return dev_err_probe(gpio->dev, err,
667+
"Cannot get APB/Debounce clocks\n");
669668

670669
err = clk_bulk_prepare_enable(DWAPB_NR_CLOCKS, gpio->clks);
671670
if (err) {

‎drivers/gpio/gpio-merrifield.c‎

Lines changed: 15 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -220,10 +220,8 @@ static void mrfld_irq_ack(struct irq_data *d)
220220
raw_spin_unlock_irqrestore(&priv->lock, flags);
221221
}
222222

223-
static void mrfld_irq_unmask_mask(struct irq_data *d, bool unmask)
223+
static void mrfld_irq_unmask_mask(struct mrfld_gpio *priv, u32 gpio, bool unmask)
224224
{
225-
struct mrfld_gpio *priv = irq_data_get_irq_chip_data(d);
226-
u32 gpio = irqd_to_hwirq(d);
227225
void __iomem *gimr = gpio_reg(&priv->chip, gpio, GIMR);
228226
unsigned long flags;
229227
u32 value;
@@ -241,12 +239,20 @@ static void mrfld_irq_unmask_mask(struct irq_data *d, bool unmask)
241239

242240
static void mrfld_irq_mask(struct irq_data *d)
243241
{
244-
mrfld_irq_unmask_mask(d, false);
242+
struct mrfld_gpio *priv = irq_data_get_irq_chip_data(d);
243+
u32 gpio = irqd_to_hwirq(d);
244+
245+
mrfld_irq_unmask_mask(priv, gpio, false);
246+
gpiochip_disable_irq(&priv->chip, gpio);
245247
}
246248

247249
static void mrfld_irq_unmask(struct irq_data *d)
248250
{
249-
mrfld_irq_unmask_mask(d, true);
251+
struct mrfld_gpio *priv = irq_data_get_irq_chip_data(d);
252+
u32 gpio = irqd_to_hwirq(d);
253+
254+
gpiochip_enable_irq(&priv->chip, gpio);
255+
mrfld_irq_unmask_mask(priv, gpio, true);
250256
}
251257

252258
static int mrfld_irq_set_type(struct irq_data *d, unsigned int type)
@@ -329,13 +335,15 @@ static int mrfld_irq_set_wake(struct irq_data *d, unsigned int on)
329335
return 0;
330336
}
331337

332-
static struct irq_chip mrfld_irqchip = {
338+
static const struct irq_chip mrfld_irqchip = {
333339
.name = "gpio-merrifield",
334340
.irq_ack = mrfld_irq_ack,
335341
.irq_mask = mrfld_irq_mask,
336342
.irq_unmask = mrfld_irq_unmask,
337343
.irq_set_type = mrfld_irq_set_type,
338344
.irq_set_wake = mrfld_irq_set_wake,
345+
.flags = IRQCHIP_IMMUTABLE,
346+
GPIOCHIP_IRQ_RESOURCE_HELPERS,
339347
};
340348

341349
static void mrfld_irq_handler(struct irq_desc *desc)
@@ -482,7 +490,7 @@ static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id
482490
return retval;
483491

484492
girq = &priv->chip.irq;
485-
girq->chip = &mrfld_irqchip;
493+
gpio_irq_chip_set_chip(girq, &mrfld_irqchip);
486494
girq->init_hw = mrfld_irq_init_hw;
487495
girq->parent_handler = mrfld_irq_handler;
488496
girq->num_parents = 1;

‎drivers/gpio/gpio-sch.c‎

Lines changed: 22 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,6 @@
3838

3939
struct sch_gpio {
4040
struct gpio_chip chip;
41-
struct irq_chip irqchip;
4241
spinlock_t lock;
4342
unsigned short iobase;
4443
unsigned short resume_base;
@@ -218,11 +217,9 @@ static void sch_irq_ack(struct irq_data *d)
218217
spin_unlock_irqrestore(&sch->lock, flags);
219218
}
220219

221-
static void sch_irq_mask_unmask(struct irq_data *d, int val)
220+
static void sch_irq_mask_unmask(struct gpio_chip *gc, irq_hw_number_t gpio_num, int val)
222221
{
223-
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
224222
struct sch_gpio *sch = gpiochip_get_data(gc);
225-
irq_hw_number_t gpio_num = irqd_to_hwirq(d);
226223
unsigned long flags;
227224

228225
spin_lock_irqsave(&sch->lock, flags);
@@ -232,14 +229,32 @@ static void sch_irq_mask_unmask(struct irq_data *d, int val)
232229

233230
static void sch_irq_mask(struct irq_data *d)
234231
{
235-
sch_irq_mask_unmask(d, 0);
232+
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
233+
irq_hw_number_t gpio_num = irqd_to_hwirq(d);
234+
235+
sch_irq_mask_unmask(gc, gpio_num, 0);
236+
gpiochip_disable_irq(gc, gpio_num);
236237
}
237238

238239
static void sch_irq_unmask(struct irq_data *d)
239240
{
240-
sch_irq_mask_unmask(d, 1);
241+
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
242+
irq_hw_number_t gpio_num = irqd_to_hwirq(d);
243+
244+
gpiochip_enable_irq(gc, gpio_num);
245+
sch_irq_mask_unmask(gc, gpio_num, 1);
241246
}
242247

248+
static const struct irq_chip sch_irqchip = {
249+
.name = "sch_gpio",
250+
.irq_ack = sch_irq_ack,
251+
.irq_mask = sch_irq_mask,
252+
.irq_unmask = sch_irq_unmask,
253+
.irq_set_type = sch_irq_type,
254+
.flags = IRQCHIP_IMMUTABLE,
255+
GPIOCHIP_IRQ_RESOURCE_HELPERS,
256+
};
257+
243258
static u32 sch_gpio_gpe_handler(acpi_handle gpe_device, u32 gpe, void *context)
244259
{
245260
struct sch_gpio *sch = context;
@@ -367,14 +382,8 @@ static int sch_gpio_probe(struct platform_device *pdev)
367382

368383
platform_set_drvdata(pdev, sch);
369384

370-
sch->irqchip.name = "sch_gpio";
371-
sch->irqchip.irq_ack = sch_irq_ack;
372-
sch->irqchip.irq_mask = sch_irq_mask;
373-
sch->irqchip.irq_unmask = sch_irq_unmask;
374-
sch->irqchip.irq_set_type = sch_irq_type;
375-
376385
girq = &sch->chip.irq;
377-
girq->chip = &sch->irqchip;
386+
gpio_irq_chip_set_chip(girq, &sch_irqchip);
378387
girq->num_parents = 0;
379388
girq->parents = NULL;
380389
girq->parent_handler = NULL;

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