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bwidawskdanvet
bwidawsk
authored and
danvet
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drm/i915: [sparse] __iomem fixes for overlay
With the exception of a forced cast for phys_obj stuff (a problem in other patches as well) all of these are fairly simple __iomem compliance fixes. As with other patches, yank/paste errors may exist. Signed-off-by: Ben Widawsky <[email protected]> [danvet: Added comment to explain the __iomem cast.] Signed-off-by: Daniel Vetter <[email protected]>
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‎drivers/gpu/drm/i915/intel_overlay.c‎

Lines changed: 75 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -187,14 +187,14 @@ struct intel_overlay {
187187
void (*flip_tail)(struct intel_overlay *);
188188
};
189189

190-
static struct overlay_registers *
190+
static struct overlay_registers __iomem *
191191
intel_overlay_map_regs(struct intel_overlay *overlay)
192192
{
193193
drm_i915_private_t *dev_priv = overlay->dev->dev_private;
194-
struct overlay_registers *regs;
194+
struct overlay_registers __iomem *regs;
195195

196196
if (OVERLAY_NEEDS_PHYSICAL(overlay->dev))
197-
regs = overlay->reg_bo->phys_obj->handle->vaddr;
197+
regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_obj->handle->vaddr;
198198
else
199199
regs = io_mapping_map_wc(dev_priv->mm.gtt_mapping,
200200
overlay->reg_bo->gtt_offset);
@@ -203,7 +203,7 @@ intel_overlay_map_regs(struct intel_overlay *overlay)
203203
}
204204

205205
static void intel_overlay_unmap_regs(struct intel_overlay *overlay,
206-
struct overlay_registers *regs)
206+
struct overlay_registers __iomem *regs)
207207
{
208208
if (!OVERLAY_NEEDS_PHYSICAL(overlay->dev))
209209
io_mapping_unmap(regs);
@@ -619,14 +619,15 @@ static const u16 uv_static_hcoeffs[N_HORIZ_UV_TAPS * N_PHASES] = {
619619
0x3000, 0x0800, 0x3000
620620
};
621621

622-
static void update_polyphase_filter(struct overlay_registers *regs)
622+
static void update_polyphase_filter(struct overlay_registers __iomem *regs)
623623
{
624-
memcpy(regs->Y_HCOEFS, y_static_hcoeffs, sizeof(y_static_hcoeffs));
625-
memcpy(regs->UV_HCOEFS, uv_static_hcoeffs, sizeof(uv_static_hcoeffs));
624+
memcpy_toio(regs->Y_HCOEFS, y_static_hcoeffs, sizeof(y_static_hcoeffs));
625+
memcpy_toio(regs->UV_HCOEFS, uv_static_hcoeffs,
626+
sizeof(uv_static_hcoeffs));
626627
}
627628

628629
static bool update_scaling_factors(struct intel_overlay *overlay,
629-
struct overlay_registers *regs,
630+
struct overlay_registers __iomem *regs,
630631
struct put_image_params *params)
631632
{
632633
/* fixed point with a 12 bit shift */
@@ -665,16 +666,19 @@ static bool update_scaling_factors(struct intel_overlay *overlay,
665666
overlay->old_xscale = xscale;
666667
overlay->old_yscale = yscale;
667668

668-
regs->YRGBSCALE = (((yscale & FRACT_MASK) << 20) |
669-
((xscale >> FP_SHIFT) << 16) |
670-
((xscale & FRACT_MASK) << 3));
669+
iowrite32(((yscale & FRACT_MASK) << 20) |
670+
((xscale >> FP_SHIFT) << 16) |
671+
((xscale & FRACT_MASK) << 3),
672+
&regs->YRGBSCALE);
671673

672-
regs->UVSCALE = (((yscale_UV & FRACT_MASK) << 20) |
673-
((xscale_UV >> FP_SHIFT) << 16) |
674-
((xscale_UV & FRACT_MASK) << 3));
674+
iowrite32(((yscale_UV & FRACT_MASK) << 20) |
675+
((xscale_UV >> FP_SHIFT) << 16) |
676+
((xscale_UV & FRACT_MASK) << 3),
677+
&regs->UVSCALE);
675678

676-
regs->UVSCALEV = ((((yscale >> FP_SHIFT) << 16) |
677-
((yscale_UV >> FP_SHIFT) << 0)));
679+
iowrite32((((yscale >> FP_SHIFT) << 16) |
680+
((yscale_UV >> FP_SHIFT) << 0)),
681+
&regs->UVSCALEV);
678682

679683
if (scale_changed)
680684
update_polyphase_filter(regs);
@@ -683,30 +687,32 @@ static bool update_scaling_factors(struct intel_overlay *overlay,
683687
}
684688

685689
static void update_colorkey(struct intel_overlay *overlay,
686-
struct overlay_registers *regs)
690+
struct overlay_registers __iomem *regs)
687691
{
688692
u32 key = overlay->color_key;
689693

690694
switch (overlay->crtc->base.fb->bits_per_pixel) {
691695
case 8:
692-
regs->DCLRKV = 0;
693-
regs->DCLRKM = CLK_RGB8I_MASK | DST_KEY_ENABLE;
696+
iowrite32(0, &regs->DCLRKV);
697+
iowrite32(CLK_RGB8I_MASK | DST_KEY_ENABLE, &regs->DCLRKM);
694698
break;
695699

696700
case 16:
697701
if (overlay->crtc->base.fb->depth == 15) {
698-
regs->DCLRKV = RGB15_TO_COLORKEY(key);
699-
regs->DCLRKM = CLK_RGB15_MASK | DST_KEY_ENABLE;
702+
iowrite32(RGB15_TO_COLORKEY(key), &regs->DCLRKV);
703+
iowrite32(CLK_RGB15_MASK | DST_KEY_ENABLE,
704+
&regs->DCLRKM);
700705
} else {
701-
regs->DCLRKV = RGB16_TO_COLORKEY(key);
702-
regs->DCLRKM = CLK_RGB16_MASK | DST_KEY_ENABLE;
706+
iowrite32(RGB16_TO_COLORKEY(key), &regs->DCLRKV);
707+
iowrite32(CLK_RGB16_MASK | DST_KEY_ENABLE,
708+
&regs->DCLRKM);
703709
}
704710
break;
705711

706712
case 24:
707713
case 32:
708-
regs->DCLRKV = key;
709-
regs->DCLRKM = CLK_RGB24_MASK | DST_KEY_ENABLE;
714+
iowrite32(key, &regs->DCLRKV);
715+
iowrite32(CLK_RGB24_MASK | DST_KEY_ENABLE, &regs->DCLRKM);
710716
break;
711717
}
712718
}
@@ -761,9 +767,10 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
761767
struct put_image_params *params)
762768
{
763769
int ret, tmp_width;
764-
struct overlay_registers *regs;
770+
struct overlay_registers __iomem *regs;
765771
bool scale_changed = false;
766772
struct drm_device *dev = overlay->dev;
773+
u32 swidth, swidthsw, sheight, ostride;
767774

768775
BUG_ON(!mutex_is_locked(&dev->struct_mutex));
769776
BUG_ON(!mutex_is_locked(&dev->mode_config.mutex));
@@ -782,16 +789,18 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
782789
goto out_unpin;
783790

784791
if (!overlay->active) {
792+
u32 oconfig;
785793
regs = intel_overlay_map_regs(overlay);
786794
if (!regs) {
787795
ret = -ENOMEM;
788796
goto out_unpin;
789797
}
790-
regs->OCONFIG = OCONF_CC_OUT_8BIT;
798+
oconfig = OCONF_CC_OUT_8BIT;
791799
if (IS_GEN4(overlay->dev))
792-
regs->OCONFIG |= OCONF_CSC_MODE_BT709;
793-
regs->OCONFIG |= overlay->crtc->pipe == 0 ?
800+
oconfig |= OCONF_CSC_MODE_BT709;
801+
oconfig |= overlay->crtc->pipe == 0 ?
794802
OCONF_PIPE_A : OCONF_PIPE_B;
803+
iowrite32(oconfig, &regs->OCONFIG);
795804
intel_overlay_unmap_regs(overlay, regs);
796805

797806
ret = intel_overlay_on(overlay);
@@ -805,42 +814,46 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
805814
goto out_unpin;
806815
}
807816

808-
regs->DWINPOS = (params->dst_y << 16) | params->dst_x;
809-
regs->DWINSZ = (params->dst_h << 16) | params->dst_w;
817+
iowrite32((params->dst_y << 16) | params->dst_x, &regs->DWINPOS);
818+
iowrite32((params->dst_h << 16) | params->dst_w, &regs->DWINSZ);
810819

811820
if (params->format & I915_OVERLAY_YUV_PACKED)
812821
tmp_width = packed_width_bytes(params->format, params->src_w);
813822
else
814823
tmp_width = params->src_w;
815824

816-
regs->SWIDTH = params->src_w;
817-
regs->SWIDTHSW = calc_swidthsw(overlay->dev,
818-
params->offset_Y, tmp_width);
819-
regs->SHEIGHT = params->src_h;
820-
regs->OBUF_0Y = new_bo->gtt_offset + params->offset_Y;
821-
regs->OSTRIDE = params->stride_Y;
825+
swidth = params->src_w;
826+
swidthsw = calc_swidthsw(overlay->dev, params->offset_Y, tmp_width);
827+
sheight = params->src_h;
828+
iowrite32(new_bo->gtt_offset + params->offset_Y, &regs->OBUF_0Y);
829+
ostride = params->stride_Y;
822830

823831
if (params->format & I915_OVERLAY_YUV_PLANAR) {
824832
int uv_hscale = uv_hsubsampling(params->format);
825833
int uv_vscale = uv_vsubsampling(params->format);
826834
u32 tmp_U, tmp_V;
827-
regs->SWIDTH |= (params->src_w/uv_hscale) << 16;
835+
swidth |= (params->src_w/uv_hscale) << 16;
828836
tmp_U = calc_swidthsw(overlay->dev, params->offset_U,
829837
params->src_w/uv_hscale);
830838
tmp_V = calc_swidthsw(overlay->dev, params->offset_V,
831839
params->src_w/uv_hscale);
832-
regs->SWIDTHSW |= max_t(u32, tmp_U, tmp_V) << 16;
833-
regs->SHEIGHT |= (params->src_h/uv_vscale) << 16;
834-
regs->OBUF_0U = new_bo->gtt_offset + params->offset_U;
835-
regs->OBUF_0V = new_bo->gtt_offset + params->offset_V;
836-
regs->OSTRIDE |= params->stride_UV << 16;
840+
swidthsw |= max_t(u32, tmp_U, tmp_V) << 16;
841+
sheight |= (params->src_h/uv_vscale) << 16;
842+
iowrite32(new_bo->gtt_offset + params->offset_U, &regs->OBUF_0U);
843+
iowrite32(new_bo->gtt_offset + params->offset_V, &regs->OBUF_0V);
844+
ostride |= params->stride_UV << 16;
837845
}
838846

847+
iowrite32(swidth, &regs->SWIDTH);
848+
iowrite32(swidthsw, &regs->SWIDTHSW);
849+
iowrite32(sheight, &regs->SHEIGHT);
850+
iowrite32(ostride, &regs->OSTRIDE);
851+
839852
scale_changed = update_scaling_factors(overlay, regs, params);
840853

841854
update_colorkey(overlay, regs);
842855

843-
regs->OCMD = overlay_cmd_reg(params);
856+
iowrite32(overlay_cmd_reg(params), &regs->OCMD);
844857

845858
intel_overlay_unmap_regs(overlay, regs);
846859

@@ -860,7 +873,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
860873

861874
int intel_overlay_switch_off(struct intel_overlay *overlay)
862875
{
863-
struct overlay_registers *regs;
876+
struct overlay_registers __iomem *regs;
864877
struct drm_device *dev = overlay->dev;
865878
int ret;
866879

@@ -879,7 +892,7 @@ int intel_overlay_switch_off(struct intel_overlay *overlay)
879892
return ret;
880893

881894
regs = intel_overlay_map_regs(overlay);
882-
regs->OCMD = 0;
895+
iowrite32(0, &regs->OCMD);
883896
intel_overlay_unmap_regs(overlay, regs);
884897

885898
ret = intel_overlay_off(overlay);
@@ -1250,10 +1263,11 @@ int intel_overlay_put_image(struct drm_device *dev, void *data,
12501263
}
12511264

12521265
static void update_reg_attrs(struct intel_overlay *overlay,
1253-
struct overlay_registers *regs)
1266+
struct overlay_registers __iomem *regs)
12541267
{
1255-
regs->OCLRC0 = (overlay->contrast << 18) | (overlay->brightness & 0xff);
1256-
regs->OCLRC1 = overlay->saturation;
1268+
iowrite32((overlay->contrast << 18) | (overlay->brightness & 0xff),
1269+
&regs->OCLRC0);
1270+
iowrite32(overlay->saturation, &regs->OCLRC1);
12571271
}
12581272

12591273
static bool check_gamma_bounds(u32 gamma1, u32 gamma2)
@@ -1306,7 +1320,7 @@ int intel_overlay_attrs(struct drm_device *dev, void *data,
13061320
struct drm_intel_overlay_attrs *attrs = data;
13071321
drm_i915_private_t *dev_priv = dev->dev_private;
13081322
struct intel_overlay *overlay;
1309-
struct overlay_registers *regs;
1323+
struct overlay_registers __iomem *regs;
13101324
int ret;
13111325

13121326
if (!dev_priv) {
@@ -1396,7 +1410,7 @@ void intel_setup_overlay(struct drm_device *dev)
13961410
drm_i915_private_t *dev_priv = dev->dev_private;
13971411
struct intel_overlay *overlay;
13981412
struct drm_i915_gem_object *reg_bo;
1399-
struct overlay_registers *regs;
1413+
struct overlay_registers __iomem *regs;
14001414
int ret;
14011415

14021416
if (!HAS_OVERLAY(dev))
@@ -1451,7 +1465,7 @@ void intel_setup_overlay(struct drm_device *dev)
14511465
if (!regs)
14521466
goto out_unpin_bo;
14531467

1454-
memset(regs, 0, sizeof(struct overlay_registers));
1468+
memset_io(regs, 0, sizeof(struct overlay_registers));
14551469
update_polyphase_filter(regs);
14561470
update_reg_attrs(overlay, regs);
14571471

@@ -1499,14 +1513,17 @@ struct intel_overlay_error_state {
14991513
u32 isr;
15001514
};
15011515

1502-
static struct overlay_registers *
1516+
static struct overlay_registers __iomem *
15031517
intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
15041518
{
15051519
drm_i915_private_t *dev_priv = overlay->dev->dev_private;
1506-
struct overlay_registers *regs;
1520+
struct overlay_registers __iomem *regs;
15071521

15081522
if (OVERLAY_NEEDS_PHYSICAL(overlay->dev))
1509-
regs = overlay->reg_bo->phys_obj->handle->vaddr;
1523+
/* Cast to make sparse happy, but it's wc memory anyway, so
1524+
* equivalent to the wc io mapping on X86. */
1525+
regs = (struct overlay_registers __iomem *)
1526+
overlay->reg_bo->phys_obj->handle->vaddr;
15101527
else
15111528
regs = io_mapping_map_atomic_wc(dev_priv->mm.gtt_mapping,
15121529
overlay->reg_bo->gtt_offset);
@@ -1515,7 +1532,7 @@ intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
15151532
}
15161533

15171534
static void intel_overlay_unmap_regs_atomic(struct intel_overlay *overlay,
1518-
struct overlay_registers *regs)
1535+
struct overlay_registers __iomem *regs)
15191536
{
15201537
if (!OVERLAY_NEEDS_PHYSICAL(overlay->dev))
15211538
io_mapping_unmap_atomic(regs);
@@ -1540,9 +1557,9 @@ intel_overlay_capture_error_state(struct drm_device *dev)
15401557
error->dovsta = I915_READ(DOVSTA);
15411558
error->isr = I915_READ(ISR);
15421559
if (OVERLAY_NEEDS_PHYSICAL(overlay->dev))
1543-
error->base = (long) overlay->reg_bo->phys_obj->handle->vaddr;
1560+
error->base = (__force long)overlay->reg_bo->phys_obj->handle->vaddr;
15441561
else
1545-
error->base = (long) overlay->reg_bo->gtt_offset;
1562+
error->base = overlay->reg_bo->gtt_offset;
15461563

15471564
regs = intel_overlay_map_regs_atomic(overlay);
15481565
if (!regs)

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