We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent a36f725 commit 63bb106Copy full SHA for 63bb106
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_dio_stream_encoder.c
@@ -294,6 +294,7 @@ static void enc32_stream_encoder_dp_unblank(
294
|| is_dp_dig_pixel_rate_div_policy(dc, ¶m->timing)) {
295
/*this logic should be the same in get_pixel_clock_parameters() */
296
n_multiply = 1;
297
+ pix_per_cycle = 1;
298
}
299
/* M / N = Fstream / Flink
300
* m_vid / n_vid = pixel rate / link rate
0 commit comments