122122#define VC5_GLOBAL_REGISTER 0x76
123123#define VC5_GLOBAL_REGISTER_GLOBAL_RESET BIT(5)
124124
125- /* PLL/ VCO runs between 2.5 GHz and 3.0 GHz */
125+ /* The minimum VCO frequency is 2.5 GHz. The maximum is variant specific. */
126126#define VC5_PLL_VCO_MIN 2500000000UL
127- #define VC5_PLL_VCO_MAX 3000000000UL
128127
129128/* VC5 Input mux settings */
130129#define VC5_MUX_IN_XIN BIT(0)
@@ -150,6 +149,7 @@ enum vc5_model {
150149 IDT_VC5_5P49V5925 ,
151150 IDT_VC5_5P49V5933 ,
152151 IDT_VC5_5P49V5935 ,
152+ IDT_VC6_5P49V60 ,
153153 IDT_VC6_5P49V6901 ,
154154 IDT_VC6_5P49V6965 ,
155155 IDT_VC6_5P49V6975 ,
@@ -161,6 +161,7 @@ struct vc5_chip_info {
161161 const unsigned int clk_fod_cnt ;
162162 const unsigned int clk_out_cnt ;
163163 const u32 flags ;
164+ const unsigned long vco_max ;
164165};
165166
166167struct vc5_driver_data ;
@@ -446,10 +447,11 @@ static long vc5_pll_round_rate(struct clk_hw *hw, unsigned long rate,
446447 unsigned long * parent_rate )
447448{
448449 struct vc5_hw_data * hwdata = container_of (hw , struct vc5_hw_data , hw );
450+ struct vc5_driver_data * vc5 = hwdata -> vc5 ;
449451 u32 div_int ;
450452 u64 div_frc ;
451453
452- rate = clamp (rate , VC5_PLL_VCO_MIN , VC5_PLL_VCO_MAX );
454+ rate = clamp (rate , VC5_PLL_VCO_MIN , vc5 -> chip_info -> vco_max );
453455
454456 /* Determine integer part, which is 12 bit wide */
455457 div_int = rate / * parent_rate ;
@@ -1209,55 +1211,71 @@ static const struct vc5_chip_info idt_5p49v5923_info = {
12091211 .clk_fod_cnt = 2 ,
12101212 .clk_out_cnt = 3 ,
12111213 .flags = 0 ,
1214+ .vco_max = 3000000000UL ,
12121215};
12131216
12141217static const struct vc5_chip_info idt_5p49v5925_info = {
12151218 .model = IDT_VC5_5P49V5925 ,
12161219 .clk_fod_cnt = 4 ,
12171220 .clk_out_cnt = 5 ,
12181221 .flags = 0 ,
1222+ .vco_max = 3000000000UL ,
12191223};
12201224
12211225static const struct vc5_chip_info idt_5p49v5933_info = {
12221226 .model = IDT_VC5_5P49V5933 ,
12231227 .clk_fod_cnt = 2 ,
12241228 .clk_out_cnt = 3 ,
12251229 .flags = VC5_HAS_INTERNAL_XTAL ,
1230+ .vco_max = 3000000000UL ,
12261231};
12271232
12281233static const struct vc5_chip_info idt_5p49v5935_info = {
12291234 .model = IDT_VC5_5P49V5935 ,
12301235 .clk_fod_cnt = 4 ,
12311236 .clk_out_cnt = 5 ,
12321237 .flags = VC5_HAS_INTERNAL_XTAL ,
1238+ .vco_max = 3000000000UL ,
1239+ };
1240+
1241+ static const struct vc5_chip_info idt_5p49v60_info = {
1242+ .model = IDT_VC6_5P49V60 ,
1243+ .clk_fod_cnt = 4 ,
1244+ .clk_out_cnt = 5 ,
1245+ .flags = VC5_HAS_PFD_FREQ_DBL | VC5_HAS_BYPASS_SYNC_BIT ,
1246+ .vco_max = 2700000000UL ,
12331247};
12341248
12351249static const struct vc5_chip_info idt_5p49v6901_info = {
12361250 .model = IDT_VC6_5P49V6901 ,
12371251 .clk_fod_cnt = 4 ,
12381252 .clk_out_cnt = 5 ,
12391253 .flags = VC5_HAS_PFD_FREQ_DBL | VC5_HAS_BYPASS_SYNC_BIT ,
1254+ .vco_max = 3000000000UL ,
12401255};
12411256
12421257static const struct vc5_chip_info idt_5p49v6965_info = {
12431258 .model = IDT_VC6_5P49V6965 ,
12441259 .clk_fod_cnt = 4 ,
12451260 .clk_out_cnt = 5 ,
12461261 .flags = VC5_HAS_BYPASS_SYNC_BIT ,
1262+ .vco_max = 3000000000UL ,
12471263};
12481264
12491265static const struct vc5_chip_info idt_5p49v6975_info = {
12501266 .model = IDT_VC6_5P49V6975 ,
12511267 .clk_fod_cnt = 4 ,
12521268 .clk_out_cnt = 5 ,
12531269 .flags = VC5_HAS_BYPASS_SYNC_BIT | VC5_HAS_INTERNAL_XTAL ,
1270+ .vco_max = 3000000000UL ,
12541271};
12551272
12561273static const struct i2c_device_id vc5_id [] = {
12571274 { "5p49v5923" , .driver_data = IDT_VC5_5P49V5923 },
12581275 { "5p49v5925" , .driver_data = IDT_VC5_5P49V5925 },
12591276 { "5p49v5933" , .driver_data = IDT_VC5_5P49V5933 },
12601277 { "5p49v5935" , .driver_data = IDT_VC5_5P49V5935 },
1278+ { "5p49v60" , .driver_data = IDT_VC6_5P49V60 },
12611279 { "5p49v6901" , .driver_data = IDT_VC6_5P49V6901 },
12621280 { "5p49v6965" , .driver_data = IDT_VC6_5P49V6965 },
12631281 { "5p49v6975" , .driver_data = IDT_VC6_5P49V6975 },
@@ -1270,6 +1288,7 @@ static const struct of_device_id clk_vc5_of_match[] = {
12701288 { .compatible = "idt,5p49v5925" , .data = & idt_5p49v5925_info },
12711289 { .compatible = "idt,5p49v5933" , .data = & idt_5p49v5933_info },
12721290 { .compatible = "idt,5p49v5935" , .data = & idt_5p49v5935_info },
1291+ { .compatible = "idt,5p49v60" , .data = & idt_5p49v60_info },
12731292 { .compatible = "idt,5p49v6901" , .data = & idt_5p49v6901_info },
12741293 { .compatible = "idt,5p49v6965" , .data = & idt_5p49v6965_info },
12751294 { .compatible = "idt,5p49v6975" , .data = & idt_5p49v6975_info },
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