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Merge branches 'clk-starfive', 'clk-ti', 'clk-terminate' and 'clk-cleanup' into clk-next
 - Audio clks on StarFive JH7100 RISC-V SoC - Terminate arrays with sentinels and make that clearer - Cleanup SPDX tags - Fix typos in comments * clk-starfive: clk: starfive: Add JH7100 audio clock driver clk: starfive: jh7100: Support more clock types clk: starfive: jh7100: Make hw clock implementation reusable dt-bindings: clock: Add starfive,jh7100-audclk bindings dt-bindings: clock: Add JH7100 audio clock definitions clk: starfive: jh7100: Handle audio_div clock properly clk: starfive: jh7100: Don't round divisor up twice * clk-ti: clk: ti: Drop legacy compatibility clocks for dra7 clk: ti: Drop legacy compatibility clocks for am4 clk: ti: Drop legacy compatibility clocks for am3 clk: ti: Update component clocks to use ti_dt_clk_name() clk: ti: Update pll and clockdomain clocks to use ti_dt_clk_name() clk: ti: Add ti_dt_clk_name() helper to use clock-output-names clk: ti: Use clock-output-names for clkctrl clk: ti: Add ti_find_clock_provider() to use clock-output-names clk: ti: Optionally parse IO address from parent clock node clk: ti: Preserve node in ti_dt_clocks_register() clk: ti: Constify clkctrl_name * clk-terminate: clk: actions: Make sentinel elements more obvious clk: clps711x: Terminate clk_div_table with sentinel element clk: hisilicon: Terminate clk_div_table with sentinel element clk: loongson1: Terminate clk_div_table with sentinel element clk: actions: Terminate clk_div_table with sentinel element * clk-cleanup: clk: zynq: Update the parameters to zynq_clk_register_periph_clk clk: zynq: trivial warning fix clk: qcom: sm6125-gcc: fix typos in comments clk: ti: clkctrl: fix typos in comments clk: COMMON_CLK_LAN966X should depend on SOC_LAN966 clk: Use of_device_get_match_data() clk: bcm2835: Remove unused variable clk: tegra: tegra124-emc: Fix missing put_device() call in emc_ensure_emc_driver clk: cleanup comments clk: socfpga: cleanup spdx tags
5 parents 9babf95 + 3028181 + 579cdf5 + 1fdfd51 + a6aa462 commit 4222744

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‎Documentation/devicetree/bindings/clock/starfive,jh7100-audclk.yaml‎

Lines changed: 57 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,57 @@
1+
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/clock/starfive,jh7100-audclk.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: StarFive JH7100 Audio Clock Generator
8+
9+
maintainers:
10+
- Emil Renner Berthing <[email protected]>
11+
12+
properties:
13+
compatible:
14+
const: starfive,jh7100-audclk
15+
16+
reg:
17+
maxItems: 1
18+
19+
clocks:
20+
items:
21+
- description: Audio source clock
22+
- description: External 12.288MHz clock
23+
- description: Domain 7 AHB bus clock
24+
25+
clock-names:
26+
items:
27+
- const: audio_src
28+
- const: audio_12288
29+
- const: dom7ahb_bus
30+
31+
'#clock-cells':
32+
const: 1
33+
description:
34+
See <dt-bindings/clock/starfive-jh7100-audio.h> for valid indices.
35+
36+
required:
37+
- compatible
38+
- reg
39+
- clocks
40+
- clock-names
41+
- '#clock-cells'
42+
43+
additionalProperties: false
44+
45+
examples:
46+
- |
47+
#include <dt-bindings/clock/starfive-jh7100.h>
48+
49+
clock-controller@10480000 {
50+
compatible = "starfive,jh7100-audclk";
51+
reg = <0x10480000 0x10000>;
52+
clocks = <&clkgen JH7100_CLK_AUDIO_SRC>,
53+
<&clkgen JH7100_CLK_AUDIO_12288>,
54+
<&clkgen JH7100_CLK_DOM7AHB_BUS>;
55+
clock-names = "audio_src", "audio_12288", "dom7ahb_bus";
56+
#clock-cells = <1>;
57+
};

‎MAINTAINERS‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -18430,12 +18430,12 @@ M: Ion Badulescu <[email protected]>
1843018430
S: Odd Fixes
1843118431
F: drivers/net/ethernet/adaptec/starfire*
1843218432

18433-
STARFIVE JH7100 CLOCK DRIVER
18433+
STARFIVE JH7100 CLOCK DRIVERS
1843418434
M: Emil Renner Berthing <[email protected]>
1843518435
S: Maintained
18436-
F: Documentation/devicetree/bindings/clock/starfive,jh7100-clkgen.yaml
18437-
F: drivers/clk/starfive/clk-starfive-jh7100.c
18438-
F: include/dt-bindings/clock/starfive-jh7100.h
18436+
F: Documentation/devicetree/bindings/clock/starfive,jh7100-*.yaml
18437+
F: drivers/clk/starfive/clk-starfive-jh7100*
18438+
F: include/dt-bindings/clock/starfive-jh7100*.h
1843918439

1844018440
STARFIVE JH7100 PINCTRL DRIVER
1844118441
M: Emil Renner Berthing <[email protected]>

‎drivers/clk/Kconfig‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -232,6 +232,7 @@ config COMMON_CLK_GEMINI
232232

233233
config COMMON_CLK_LAN966X
234234
bool "Generic Clock Controller driver for LAN966X SoC"
235+
depends on SOC_LAN966 || COMPILE_TEST
235236
help
236237
This driver provides support for Generic Clock Controller(GCK) on
237238
LAN966X SoC. GCK generates and supplies clock to various peripherals

‎drivers/clk/actions/owl-s500.c‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -95,7 +95,7 @@
9595

9696
static const struct clk_pll_table clk_audio_pll_table[] = {
9797
{ 0, 45158400 }, { 1, 49152000 },
98-
{ 0, 0 },
98+
{ /* sentinel */ }
9999
};
100100

101101
/* pll clocks */
@@ -138,46 +138,46 @@ static struct clk_factor_table sd_factor_table[] = {
138138
{ 272, 1, 17 * 128 }, { 273, 1, 18 * 128 }, { 274, 1, 19 * 128 }, { 275, 1, 20 * 128 },
139139
{ 276, 1, 21 * 128 }, { 277, 1, 22 * 128 }, { 278, 1, 23 * 128 }, { 279, 1, 24 * 128 },
140140
{ 280, 1, 25 * 128 },
141-
{ 0, 0, 0 },
141+
{ /* sentinel */ }
142142
};
143143

144144
static struct clk_factor_table de_factor_table[] = {
145145
{ 0, 1, 1 }, { 1, 2, 3 }, { 2, 1, 2 }, { 3, 2, 5 },
146146
{ 4, 1, 3 }, { 5, 1, 4 }, { 6, 1, 6 }, { 7, 1, 8 },
147147
{ 8, 1, 12 },
148-
{ 0, 0, 0 },
148+
{ /* sentinel */ }
149149
};
150150

151151
static struct clk_factor_table hde_factor_table[] = {
152152
{ 0, 1, 1 }, { 1, 2, 3 }, { 2, 1, 2 }, { 3, 2, 5 },
153153
{ 4, 1, 3 }, { 5, 1, 4 }, { 6, 1, 6 }, { 7, 1, 8 },
154-
{ 0, 0, 0 },
154+
{ /* sentinel */ }
155155
};
156156

157157
static struct clk_div_table rmii_ref_div_table[] = {
158158
{ 0, 4 }, { 1, 10 },
159-
{ 0, 0 },
159+
{ /* sentinel */ }
160160
};
161161

162162
static struct clk_div_table std12rate_div_table[] = {
163163
{ 0, 1 }, { 1, 2 }, { 2, 3 }, { 3, 4 },
164164
{ 4, 5 }, { 5, 6 }, { 6, 7 }, { 7, 8 },
165165
{ 8, 9 }, { 9, 10 }, { 10, 11 }, { 11, 12 },
166-
{ 0, 0 },
166+
{ /* sentinel */ }
167167
};
168168

169169
static struct clk_div_table i2s_div_table[] = {
170170
{ 0, 1 }, { 1, 2 }, { 2, 3 }, { 3, 4 },
171171
{ 4, 6 }, { 5, 8 }, { 6, 12 }, { 7, 16 },
172172
{ 8, 24 },
173-
{ 0, 0 },
173+
{ /* sentinel */ }
174174
};
175175

176176
static struct clk_div_table nand_div_table[] = {
177177
{ 0, 1 }, { 1, 2 }, { 2, 4 }, { 3, 6 },
178178
{ 4, 8 }, { 5, 10 }, { 6, 12 }, { 7, 14 },
179179
{ 8, 16 }, { 9, 18 }, { 10, 20 }, { 11, 22 },
180-
{ 0, 0 },
180+
{ /* sentinel */ }
181181
};
182182

183183
/* mux clock */

‎drivers/clk/actions/owl-s700.c‎

Lines changed: 10 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -73,7 +73,7 @@
7373

7474
static struct clk_pll_table clk_audio_pll_table[] = {
7575
{0, 45158400}, {1, 49152000},
76-
{0, 0},
76+
{ /* sentinel */ }
7777
};
7878

7979
static struct clk_pll_table clk_cvbs_pll_table[] = {
@@ -82,7 +82,8 @@ static struct clk_pll_table clk_cvbs_pll_table[] = {
8282
{33, 35 * 12000000}, {34, 36 * 12000000}, {35, 37 * 12000000},
8383
{36, 38 * 12000000}, {37, 39 * 12000000}, {38, 40 * 12000000},
8484
{39, 41 * 12000000}, {40, 42 * 12000000}, {41, 43 * 12000000},
85-
{42, 44 * 12000000}, {43, 45 * 12000000}, {0, 0},
85+
{42, 44 * 12000000}, {43, 45 * 12000000},
86+
{ /* sentinel */ }
8687
};
8788

8889
/* pll clocks */
@@ -137,7 +138,7 @@ static struct clk_factor_table sd_factor_table[] = {
137138
{276, 1, 21 * 128}, {277, 1, 22 * 128}, {278, 1, 23 * 128}, {279, 1, 24 * 128},
138139
{280, 1, 25 * 128}, {281, 1, 26 * 128},
139140

140-
{0, 0},
141+
{ /* sentinel */ }
141142
};
142143

143144
static struct clk_factor_table lcd_factor_table[] = {
@@ -150,18 +151,19 @@ static struct clk_factor_table lcd_factor_table[] = {
150151
{256, 1, 1 * 7}, {257, 1, 2 * 7}, {258, 1, 3 * 7}, {259, 1, 4 * 7},
151152
{260, 1, 5 * 7}, {261, 1, 6 * 7}, {262, 1, 7 * 7}, {263, 1, 8 * 7},
152153
{264, 1, 9 * 7}, {265, 1, 10 * 7}, {266, 1, 11 * 7}, {267, 1, 12 * 7},
153-
{0, 0},
154+
{ /* sentinel */ }
154155
};
155156

156157
static struct clk_div_table hdmia_div_table[] = {
157158
{0, 1}, {1, 2}, {2, 3}, {3, 4},
158159
{4, 6}, {5, 8}, {6, 12}, {7, 16},
159160
{8, 24},
160-
{0, 0},
161+
{ /* sentinel */ }
161162
};
162163

163164
static struct clk_div_table rmii_div_table[] = {
164165
{0, 4}, {1, 10},
166+
{ /* sentinel */ }
165167
};
166168

167169
/* divider clocks */
@@ -178,13 +180,14 @@ static OWL_DIVIDER(clk_rmii_ref, "rmii_ref", "ethernet_pll", CMU_ETHERNETPLL, 2,
178180
static struct clk_factor_table de_factor_table[] = {
179181
{0, 1, 1}, {1, 2, 3}, {2, 1, 2}, {3, 2, 5},
180182
{4, 1, 3}, {5, 1, 4}, {6, 1, 6}, {7, 1, 8},
181-
{8, 1, 12}, {0, 0, 0},
183+
{8, 1, 12},
184+
{ /* sentinel */ }
182185
};
183186

184187
static struct clk_factor_table hde_factor_table[] = {
185188
{0, 1, 1}, {1, 2, 3}, {2, 1, 2}, {3, 2, 5},
186189
{4, 1, 3}, {5, 1, 4}, {6, 1, 6}, {7, 1, 8},
187-
{0, 0, 0},
190+
{ /* sentinel */ }
188191
};
189192

190193
/* gate clocks */

‎drivers/clk/actions/owl-s900.c‎

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -73,12 +73,12 @@
7373

7474
static struct clk_pll_table clk_audio_pll_table[] = {
7575
{ 0, 45158400 }, { 1, 49152000 },
76-
{ 0, 0 },
76+
{ /* sentinel */ }
7777
};
7878

7979
static struct clk_pll_table clk_edp_pll_table[] = {
8080
{ 0, 810000000 }, { 1, 135000000 }, { 2, 270000000 },
81-
{ 0, 0 },
81+
{ /* sentinel */ }
8282
};
8383

8484
/* pll clocks */
@@ -120,41 +120,41 @@ static struct clk_div_table nand_div_table[] = {
120120
{ 4, 8 }, { 5, 10 }, { 6, 12 }, { 7, 14 },
121121
{ 8, 16 }, { 9, 18 }, { 10, 20 }, { 11, 22 },
122122
{ 12, 24 }, { 13, 26 }, { 14, 28 }, { 15, 30 },
123-
{ 0, 0 },
123+
{ /* sentinel */ }
124124
};
125125

126126
static struct clk_div_table apb_div_table[] = {
127127
{ 1, 2 }, { 2, 3 }, { 3, 4 },
128-
{ 0, 0 },
128+
{ /* sentinel */ }
129129
};
130130

131131
static struct clk_div_table eth_mac_div_table[] = {
132132
{ 0, 2 }, { 1, 4 },
133-
{ 0, 0 },
133+
{ /* sentinel */ }
134134
};
135135

136136
static struct clk_div_table rmii_ref_div_table[] = {
137137
{ 0, 4 }, { 1, 10 },
138-
{ 0, 0 },
138+
{ /* sentinel */ }
139139
};
140140

141141
static struct clk_div_table usb3_mac_div_table[] = {
142142
{ 1, 2 }, { 2, 3 }, { 3, 4 },
143-
{ 0, 8 },
143+
{ /* sentinel */ }
144144
};
145145

146146
static struct clk_div_table i2s_div_table[] = {
147147
{ 0, 1 }, { 1, 2 }, { 2, 3 }, { 3, 4 },
148148
{ 4, 6 }, { 5, 8 }, { 6, 12 }, { 7, 16 },
149149
{ 8, 24 },
150-
{ 0, 0 },
150+
{ /* sentinel */ }
151151
};
152152

153153
static struct clk_div_table hdmia_div_table[] = {
154154
{ 0, 1 }, { 1, 2 }, { 2, 3 }, { 3, 4 },
155155
{ 4, 6 }, { 5, 8 }, { 6, 12 }, { 7, 16 },
156156
{ 8, 24 },
157-
{ 0, 0 },
157+
{ /* sentinel */ }
158158
};
159159

160160
/* divider clocks */
@@ -185,24 +185,24 @@ static struct clk_factor_table sd_factor_table[] = {
185185
{ 280, 1, 25 * 128 }, { 281, 1, 26 * 128 }, { 282, 1, 27 * 128 }, { 283, 1, 28 * 128 },
186186
{ 284, 1, 29 * 128 }, { 285, 1, 30 * 128 }, { 286, 1, 31 * 128 }, { 287, 1, 32 * 128 },
187187

188-
{ 0, 0 },
188+
{ /* sentinel */ }
189189
};
190190

191191
static struct clk_factor_table dmm_factor_table[] = {
192192
{ 0, 1, 1 }, { 1, 2, 3 }, { 2, 1, 2 }, { 3, 1, 3 },
193193
{ 4, 1, 4 },
194-
{ 0, 0, 0 },
194+
{ /* sentinel */ }
195195
};
196196

197197
static struct clk_factor_table noc_factor_table[] = {
198198
{ 0, 1, 1 }, { 1, 2, 3 }, { 2, 1, 2 }, { 3, 1, 3 }, { 4, 1, 4 },
199-
{ 0, 0, 0 },
199+
{ /* sentinel */ }
200200
};
201201

202202
static struct clk_factor_table bisp_factor_table[] = {
203203
{ 0, 1, 1 }, { 1, 2, 3 }, { 2, 1, 2 }, { 3, 2, 5 },
204204
{ 4, 1, 3 }, { 5, 1, 4 }, { 6, 1, 6 }, { 7, 1, 8 },
205-
{ 0, 0, 0 },
205+
{ /* sentinel */ }
206206
};
207207

208208
/* factor clocks */

‎drivers/clk/at91/sckc.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -535,7 +535,7 @@ static int clk_sama5d4_slow_osc_prepare(struct clk_hw *hw)
535535

536536
/*
537537
* Assume that if it has already been selected (for example by the
538-
* bootloader), enough time has aready passed.
538+
* bootloader), enough time has already passed.
539539
*/
540540
if ((readl(osc->sckcr) & osc->bits->cr_oscsel)) {
541541
osc->prepared = true;

‎drivers/clk/axis/clk-artpec6.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
/*
33
* ARTPEC-6 clock initialization
44
*
5-
* Copyright 2015-2016 Axis Comunications AB.
5+
* Copyright 2015-2016 Axis Communications AB.
66
*/
77

88
#include <linux/clk-provider.h>

‎drivers/clk/bcm/clk-bcm2835.c‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -939,10 +939,8 @@ static u32 bcm2835_clock_choose_div(struct clk_hw *hw,
939939
u32 unused_frac_mask =
940940
GENMASK(CM_DIV_FRAC_BITS - data->frac_bits, 0) >> 1;
941941
u64 temp = (u64)parent_rate << CM_DIV_FRAC_BITS;
942-
u64 rem;
943942
u32 div, mindiv, maxdiv;
944943

945-
rem = do_div(temp, rate);
946944
div = temp;
947945
div &= ~unused_frac_mask;
948946

‎drivers/clk/bcm/clk-iproc.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -89,7 +89,7 @@
8989
* Parameters for VCO frequency configuration
9090
*
9191
* VCO frequency =
92-
* ((ndiv_int + ndiv_frac / 2^20) * (ref freqeuncy / pdiv)
92+
* ((ndiv_int + ndiv_frac / 2^20) * (ref frequency / pdiv)
9393
*/
9494
struct iproc_pll_vco_param {
9595
unsigned long rate;

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