@@ -1339,14 +1339,16 @@ struct i40e_aqc_add_remove_cloud_filters {
13391339#define I40E_AQC_ADD_CLOUD_CMD_SEID_NUM_SHIFT 0
13401340#define I40E_AQC_ADD_CLOUD_CMD_SEID_NUM_MASK (0x3FF << \
13411341 I40E_AQC_ADD_CLOUD_CMD_SEID_NUM_SHIFT)
1342- u8 reserved2 [4 ];
1342+ u8 big_buffer_flag ;
1343+ #define I40E_AQC_ADD_CLOUD_CMD_BB 1
1344+ u8 reserved2 [3 ];
13431345 __le32 addr_high ;
13441346 __le32 addr_low ;
13451347};
13461348
13471349I40E_CHECK_CMD_LENGTH (i40e_aqc_add_remove_cloud_filters );
13481350
1349- struct i40e_aqc_add_remove_cloud_filters_element_data {
1351+ struct i40e_aqc_cloud_filters_element_data {
13501352 u8 outer_mac [6 ];
13511353 u8 inner_mac [6 ];
13521354 __le16 inner_vlan ;
@@ -1376,6 +1378,10 @@ struct i40e_aqc_add_remove_cloud_filters_element_data {
13761378#define I40E_AQC_ADD_CLOUD_FILTER_IMAC 0x000A
13771379#define I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC 0x000B
13781380#define I40E_AQC_ADD_CLOUD_FILTER_IIP 0x000C
1381+ /* 0x0010 to 0x0017 is for custom filters */
1382+ #define I40E_AQC_ADD_CLOUD_FILTER_IP_PORT 0x0010 /* Dest IP + L4 Port */
1383+ #define I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT 0x0011 /* Dest MAC + L4 Port */
1384+ #define I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT 0x0012 /* Dest MAC + VLAN + L4 Port */
13791385
13801386#define I40E_AQC_ADD_CLOUD_FLAGS_TO_QUEUE 0x0080
13811387#define I40E_AQC_ADD_CLOUD_VNK_SHIFT 6
@@ -1410,6 +1416,49 @@ struct i40e_aqc_add_remove_cloud_filters_element_data {
14101416 u8 response_reserved [7 ];
14111417};
14121418
1419+ I40E_CHECK_STRUCT_LEN (0x40 , i40e_aqc_cloud_filters_element_data );
1420+
1421+ /* i40e_aqc_cloud_filters_element_bb is used when
1422+ * I40E_AQC_ADD_CLOUD_CMD_BB flag is set.
1423+ */
1424+ struct i40e_aqc_cloud_filters_element_bb {
1425+ struct i40e_aqc_cloud_filters_element_data element ;
1426+ u16 general_fields [32 ];
1427+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X10_WORD0 0
1428+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X10_WORD1 1
1429+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X10_WORD2 2
1430+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD0 3
1431+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD1 4
1432+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD2 5
1433+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X12_WORD0 6
1434+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X12_WORD1 7
1435+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X12_WORD2 8
1436+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X13_WORD0 9
1437+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X13_WORD1 10
1438+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X13_WORD2 11
1439+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X14_WORD0 12
1440+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X14_WORD1 13
1441+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X14_WORD2 14
1442+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0 15
1443+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD1 16
1444+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD2 17
1445+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD3 18
1446+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD4 19
1447+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD5 20
1448+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD6 21
1449+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD7 22
1450+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X17_WORD0 23
1451+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X17_WORD1 24
1452+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X17_WORD2 25
1453+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X17_WORD3 26
1454+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X17_WORD4 27
1455+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X17_WORD5 28
1456+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X17_WORD6 29
1457+ #define I40E_AQC_ADD_CLOUD_FV_FLU_0X17_WORD7 30
1458+ };
1459+
1460+ I40E_CHECK_STRUCT_LEN (0x80 , i40e_aqc_cloud_filters_element_bb );
1461+
14131462struct i40e_aqc_remove_cloud_filters_completion {
14141463 __le16 perfect_ovlan_used ;
14151464 __le16 perfect_ovlan_free ;
@@ -1421,6 +1470,60 @@ struct i40e_aqc_remove_cloud_filters_completion {
14211470
14221471I40E_CHECK_CMD_LENGTH (i40e_aqc_remove_cloud_filters_completion );
14231472
1473+ /* Replace filter Command 0x025F
1474+ * uses the i40e_aqc_replace_cloud_filters,
1475+ * and the generic indirect completion structure
1476+ */
1477+ struct i40e_filter_data {
1478+ u8 filter_type ;
1479+ u8 input [3 ];
1480+ };
1481+
1482+ I40E_CHECK_STRUCT_LEN (4 , i40e_filter_data );
1483+
1484+ struct i40e_aqc_replace_cloud_filters_cmd {
1485+ u8 valid_flags ;
1486+ #define I40E_AQC_REPLACE_L1_FILTER 0x0
1487+ #define I40E_AQC_REPLACE_CLOUD_FILTER 0x1
1488+ #define I40E_AQC_GET_CLOUD_FILTERS 0x2
1489+ #define I40E_AQC_MIRROR_CLOUD_FILTER 0x4
1490+ #define I40E_AQC_HIGH_PRIORITY_CLOUD_FILTER 0x8
1491+ u8 old_filter_type ;
1492+ u8 new_filter_type ;
1493+ u8 tr_bit ;
1494+ u8 reserved [4 ];
1495+ __le32 addr_high ;
1496+ __le32 addr_low ;
1497+ };
1498+
1499+ I40E_CHECK_CMD_LENGTH (i40e_aqc_replace_cloud_filters_cmd );
1500+
1501+ struct i40e_aqc_replace_cloud_filters_cmd_buf {
1502+ u8 data [32 ];
1503+ /* Filter type INPUT codes*/
1504+ #define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_ENTRIES_MAX 3
1505+ #define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED BIT(7)
1506+
1507+ /* Field Vector offsets */
1508+ #define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_MAC_DA 0
1509+ #define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG_ETH 6
1510+ #define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG 7
1511+ #define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_VLAN 8
1512+ #define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG_OVLAN 9
1513+ #define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG_IVLAN 10
1514+ #define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TUNNLE_KEY 11
1515+ #define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_IMAC 12
1516+ /* big FLU */
1517+ #define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_IP_DA 14
1518+ /* big FLU */
1519+ #define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_OIP_DA 15
1520+
1521+ #define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_INNER_VLAN 37
1522+ struct i40e_filter_data filters [8 ];
1523+ };
1524+
1525+ I40E_CHECK_STRUCT_LEN (0x40 , i40e_aqc_replace_cloud_filters_cmd_buf );
1526+
14241527/* Add Mirror Rule (indirect or direct 0x0260)
14251528 * Delete Mirror Rule (indirect or direct 0x0261)
14261529 * note: some rule types (4,5) do not use an external buffer.
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