Skip to content

Commit 1869b62

Browse files
ickledanvet
authored andcommitted
drm/i915: Only the zap the VMA after updating the tiling parameters
If we fail to unbind and so abort the change in tiling, we will have removed the VMA for the object for no reason. The likelihood of unbind failing is slim (other than ERESTARTSYS which will cause userspace to try again), so the change is mostly for the principle. Also improve the slightly stale comment. Signed-off-by: Chris Wilson <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
1 parent 5d82e3e commit 1869b62

File tree

1 file changed

+6
-2
lines changed

1 file changed

+6
-2
lines changed

drivers/gpu/drm/i915/i915_gem_tiling.c

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -354,14 +354,15 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
354354
/* We need to rebind the object if its current allocation
355355
* no longer meets the alignment restrictions for its new
356356
* tiling mode. Otherwise we can just leave it alone, but
357-
* need to ensure that any fence register is cleared.
357+
* need to ensure that any fence register is updated before
358+
* the next fenced (either through the GTT or by the BLT unit
359+
* on older GPUs) access.
358360
*
359361
* After updating the tiling parameters, we then flag whether
360362
* we need to update an associated fence register. Note this
361363
* has to also include the unfenced register the GPU uses
362364
* whilst executing a fenced command for an untiled object.
363365
*/
364-
i915_gem_release_mmap(obj);
365366

366367
obj->map_and_fenceable =
367368
obj->gtt_space == NULL ||
@@ -385,6 +386,9 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
385386

386387
obj->tiling_mode = args->tiling_mode;
387388
obj->stride = args->stride;
389+
390+
/* Force the fence to be reacquired for GTT access */
391+
i915_gem_release_mmap(obj);
388392
}
389393
}
390394
/* we have to maintain this existing ABI... */

0 commit comments

Comments
 (0)