HSD #15010087323-3 :intel_fcs: Add SMMU support for FCS largeblob encryption

Existing FCS largeblob encryption operations uses SVC shared memory
pool which is limited to 32MB and a maximum of 4MB can be allocated
per buffer from the SVC shared memory pool. For large plaintext
files the number of transactions increases and the time taken to
complete the operation increases.

SMMU is used to overcome this limitation by allocating a chunk of
virtually contiguous buffer and mapping the physical address of the
buffer into a range of addresses accessible by the SDM using a SMMU
translation table. This allows the data to appear contiguous virtually
but is physically scattered. The mapped buffer will be returned to
the FCS client to be populated with the plaintext data. The driver
will then send the virtual starting address of the mapped buffer
based on the translation table to SDM. When SDM attempts to read/write
to the address the SMMU TBU will translate the virtual address to the
physical address based on the SMMU translation table.

Update makefile to build added file intel_fcs_smmu.c.

Add initialization sequence to program SMMU registers associated to
SDM SMMU TBU. SMMU TBU connected to the SDM is operating as a secure
device hence the registers associated to the stream ID and context
bank is programmed configured manually during fcs driver probe.

Add new implementation based on existing fcs operations that supports
largeblob with SMMU support. These implementations will use the
staticaly allocated buffer that is mapped to the SMMU translation
table instead of the SVC buffer. These implementations uses
asynchronous mailbox send commands to prevent timing issues
when processing large plaintext files.

Add checking to only enable SMMU when ATF and SDM firmware versions
are updated with SMMU enablement support. This is prevent backward
compatibility issues when users did not update the firmware versions.

Update fcs ioctl with commands for SMMU supported operations.

Signed-off-by: Adrian Ng Ho Yin <[email protected]>

Author: hoyin0722

drivers/crypto/Makefile

@@ -18,6 +18,7 @@ obj-$(CONFIG_CRYPTO_DEV_GEODE) += geode-aes.o
 obj-$(CONFIG_CRYPTO_DEV_HIFN_795X) += hifn_795x.o
 obj-$(CONFIG_CRYPTO_DEV_IMGTEC_HASH) += img-hash.o
 obj-$(CONFIG_CRYPTO_DEV_INTEL_FCS) += intel_fcs.o
+intel_fcs-objs := intel_fcs_main.o intel_fcs_smmu.o
 obj-$(CONFIG_CRYPTO_DEV_IXP4XX) += ixp4xx_crypto.o
 obj-$(CONFIG_CRYPTO_DEV_MARVELL) += marvell/
 obj-$(CONFIG_CRYPTO_DEV_MXS_DCP) += mxs-dcp.o