From 12c87f8bf12eaf0cb26709cab59e69a6628e2da3 Mon Sep 17 00:00:00 2001 From: Graham Date: Mon, 15 Jul 2019 15:05:15 -0500 Subject: [PATCH] Fixes issues #4, #6 --- adafruit_si5351.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/adafruit_si5351.py b/adafruit_si5351.py index 49a0f19..3e79f12 100644 --- a/adafruit_si5351.py +++ b/adafruit_si5351.py @@ -211,7 +211,7 @@ def configure_fractional(self, multiplier, numerator, denominator): susceptible to jitter but allows a larger range of PLL frequencies. """ assert 14 < multiplier < 91 - assert 0 < denominator < 0xFFFFF # Prevent divide by zero. + assert 0 < denominator <= 0xFFFFF # Prevent divide by zero. assert 0 <= numerator < 0xFFFFF multiplier = int(multiplier) numerator = int(numerator) @@ -295,7 +295,7 @@ def r_divider(self): @r_divider.setter def r_divider(self, divider): - assert 0 <= divider <= 6 + assert 0 <= divider <= 7 reg_value = self._si5351._read_u8(self._r) reg_value &= 0x0F divider &= 0x07 @@ -347,7 +347,7 @@ def configure_fractional(self, pll, divider, numerator, denominator): accurate but has a wider range of output frequencies. """ assert 3 < divider < 901 - assert 0 < denominator < 0xFFFFF # Prevent divide by zero. + assert 0 < denominator <= 0xFFFFF # Prevent divide by zero. assert 0 <= numerator < 0xFFFFF divider = int(divider) numerator = int(numerator)