@@ -4356,24 +4356,28 @@ SPIRVValue *LLVMToSPIRVBase::transIntrinsicInst(IntrinsicInst *II,
43564356 BM->addIntegerType (VecTy->getElementType ()->getIntegerBitWidth ());
43574357 SPIRVTypeInt *I32STy = BM->addIntegerType (32 );
43584358 unsigned VecSize = VecTy->getElementCount ().getFixedValue ();
4359- SmallVector<SPIRVValue *, 16 > Extracts (VecSize);
4360- for (unsigned Idx = 0 ; Idx < VecSize; ++Idx) {
4361- Extracts[Idx] = BM->addVectorExtractDynamicInst (
4362- VecSVal, BM->addIntegerConstant (I32STy, Idx), BB);
4363- }
4364- unsigned Counter = VecSize >> 1 ;
4365- while (Counter != 0 ) {
4366- for (unsigned Idx = 0 ; Idx < Counter; ++Idx) {
4367- Extracts[Idx] = BM->addBinaryInst (Op, ResultSType, Extracts[Idx << 1 ],
4368- Extracts[(Idx << 1 ) + 1 ], BB);
4359+ if (VecSize > 0 ) {
4360+ SmallVector<SPIRVValue *, 16 > Extracts (VecSize);
4361+ for (unsigned Idx = 0 ; Idx < VecSize; ++Idx) {
4362+ Extracts[Idx] = BM->addVectorExtractDynamicInst (
4363+ VecSVal, BM->addIntegerConstant (I32STy, Idx), BB);
43694364 }
4370- Counter >>= 1 ;
4371- }
4372- if ((VecSize & 1 ) != 0 ) {
4373- Extracts[0 ] = BM->addBinaryInst (Op, ResultSType, Extracts[0 ],
4374- Extracts[VecSize - 1 ], BB);
4365+ unsigned Counter = VecSize >> 1 ;
4366+ while (Counter != 0 ) {
4367+ for (unsigned Idx = 0 ; Idx < Counter; ++Idx) {
4368+ Extracts[Idx] = BM->addBinaryInst (Op, ResultSType, Extracts[Idx << 1 ],
4369+ Extracts[(Idx << 1 ) + 1 ], BB);
4370+ }
4371+ Counter >>= 1 ;
4372+ }
4373+ if ((VecSize & 1 ) != 0 ) {
4374+ Extracts[0 ] = BM->addBinaryInst (Op, ResultSType, Extracts[0 ],
4375+ Extracts[VecSize - 1 ], BB);
4376+ }
4377+ return Extracts[0 ];
43754378 }
4376- return Extracts[0 ];
4379+ assert (VecSize && " Zero Extracts size for vector reduce lowering" );
4380+ return nullptr ;
43774381 }
43784382 case Intrinsic::vector_reduce_fadd:
43794383 case Intrinsic::vector_reduce_fmul: {
@@ -4432,27 +4436,31 @@ SPIRVValue *LLVMToSPIRVBase::transIntrinsicInst(IntrinsicInst *II,
44324436 SPIRVTypeInt *I32STy = BM->addIntegerType (32 );
44334437 unsigned VecSize = VecTy->getElementCount ().getFixedValue ();
44344438 SmallVector<SPIRVValue *, 16 > Extracts (VecSize);
4435- for (unsigned Idx = 0 ; Idx < VecSize; ++Idx) {
4436- Extracts[Idx] = BM->addVectorExtractDynamicInst (
4437- VecSVal, BM->addIntegerConstant (I32STy, Idx), BB);
4438- }
4439- unsigned Counter = VecSize >> 1 ;
4440- while (Counter != 0 ) {
4441- for (unsigned Idx = 0 ; Idx < Counter; ++Idx) {
4442- SPIRVValue *Cond = BM->addBinaryInst (Op, BoolSTy, Extracts[Idx << 1 ],
4443- Extracts[(Idx << 1 ) + 1 ], BB);
4444- Extracts[Idx] = BM->addSelectInst (Cond, Extracts[Idx << 1 ],
4445- Extracts[(Idx << 1 ) + 1 ], BB);
4439+ if (VecSize > 0 ) {
4440+ for (unsigned Idx = 0 ; Idx < VecSize; ++Idx) {
4441+ Extracts[Idx] = BM->addVectorExtractDynamicInst (
4442+ VecSVal, BM->addIntegerConstant (I32STy, Idx), BB);
44464443 }
4447- Counter >>= 1 ;
4448- }
4449- if ((VecSize & 1 ) != 0 ) {
4450- SPIRVValue *Cond = BM->addBinaryInst (Op, BoolSTy, Extracts[0 ],
4451- Extracts[VecSize - 1 ], BB);
4452- Extracts[0 ] =
4453- BM->addSelectInst (Cond, Extracts[0 ], Extracts[VecSize - 1 ], BB);
4444+ unsigned Counter = VecSize >> 1 ;
4445+ while (Counter != 0 ) {
4446+ for (unsigned Idx = 0 ; Idx < Counter; ++Idx) {
4447+ SPIRVValue *Cond = BM->addBinaryInst (Op, BoolSTy, Extracts[Idx << 1 ],
4448+ Extracts[(Idx << 1 ) + 1 ], BB);
4449+ Extracts[Idx] = BM->addSelectInst (Cond, Extracts[Idx << 1 ],
4450+ Extracts[(Idx << 1 ) + 1 ], BB);
4451+ }
4452+ Counter >>= 1 ;
4453+ }
4454+ if ((VecSize & 1 ) != 0 ) {
4455+ SPIRVValue *Cond = BM->addBinaryInst (Op, BoolSTy, Extracts[0 ],
4456+ Extracts[VecSize - 1 ], BB);
4457+ Extracts[0 ] =
4458+ BM->addSelectInst (Cond, Extracts[0 ], Extracts[VecSize - 1 ], BB);
4459+ }
4460+ return Extracts[0 ];
44544461 }
4455- return Extracts[0 ];
4462+ assert (VecSize && " Zero Extracts size for vector reduce lowering" );
4463+ return nullptr ;
44564464 }
44574465 case Intrinsic::memset: {
44584466 // Generally there is no direct mapping of memset to SPIR-V. But it turns
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